XC5VLX50T-1FFG665C Xilinx Inc, XC5VLX50T-1FFG665C Datasheet - Page 241

• Manufacturer Part Number: XC5VLX50T-1FFG665C
• Description: FPGA, VIRTEX-5 LXT, 50K, 665FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXTr

Specifications of XC5VLX50T-1FFG665C

• No. Of Logic Blocks: 7200
• Family Type: Virtex-5
• No. Of Speed Grades: 1
• Total Ram Bits: 2211840
• No. Of I/o's: 360
• Clock Management: DCM, PLL
• I/o Supply Voltage: 3.3V
• Operating Frequency Max: 550MHz
• Number Of Logic Elements/cells: 46080
• Number Of Labs/clbs: 3600
• Number Of I /o: 360
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 665-BBGA, FCBGA
• Core Supply Voltage Range: 1V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
• Number Of Gates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 122-1565

Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
LVCMOS (Low Voltage Complementary Metal Oxide Semiconductor)
Table 6-5
Table 6-5: Allowed Attributes for the LVTTL I/O Standard
LVCMOS is a widely used switching standard implemented in CMOS transistors. This
standard is defined by JEDEC (JESD 8-5). The LVCMOS standards supported in Virtex-5
FPGAs are: LVCMOS12, LVCMOS15, LVCMOS18, LVCMOS25, and LVCMOS33.
Sample circuits illustrating both unidirectional and bidirectional LVCMOS termination
techniques are shown in
X-Ref Target - Figure 6-29
IOSTANDARD
DRIVE
SLEW
Attributes
details the allowed attributes that can be applied to the LVTTL I/O standard.
LVCMOS
LVCMOS
LVCMOS
Figure 6-29: LVCMOS Unidirectional Termination
IOB
IOB
IOB
Note: V
Figure 6-29
www.xilinx.com
R S = Z 0 – R D
TT
IBUF/IBUFG
is any voltage from 0V to V CCO
UNUSED
UNUSED
LVTTL
R P = Z 0
Z 0
Z 0
and
Specific Guidelines for I/O Supported Standards
Z 0
V
Figure
TT
6-30.
2, 4, 6, 8, 12, 16, 24
IOB
IOB
IOB
LVCMOS
LVCMOS
LVCMOS
OBUF/OBUFT
{FAST, SLOW}
Primitives
LVTTL
ug190_6_26_022806
2, 4, 6, 8, 12, 16, 24
{FAST, SLOW}
IOBUF
LVTTL
241