MCP4725A2T-E/CH Microchip Technology, MCP4725A2T-E/CH Datasheet - Page 15

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MCP4725A2T-E/CH

Manufacturer Part Number
MCP4725A2T-E/CH
Description
DAC 1-CH Resistor-String 12-Bit 6-Pin SOT-23 T/R
Manufacturer
Microchip Technology
Datasheets

Specifications of MCP4725A2T-E/CH

Package
6SOT-23
Resolution
12 Bit
Architecture
Resistor-String
Digital Interface Type
Serial (2-Wire, I2C)
Number Of Outputs Per Chip
1
Output Type
Voltage
Full Scale Error
±2 %FSR
Integral Nonlinearity Error
±14.5 LSB
Maximum Settling Time
6(Typ) us
Settling Time
6µs
Number Of Bits
12
Data Interface
I²C, Serial
Number Of Converters
1
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
SOT-23-6
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP4725DM-PTPLS - BOARD DAUGHTER PICTAIL MCP4725
Power Dissipation (max)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MCP4725A2T-E/CH
MCP4725A2T-E/CHTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP4725A2T-E/CH
Manufacturer:
Microchip
Quantity:
4 377
4.0
4.1
The resolution is the number of DAC output states that
divide the full scale range. For the 12-bit DAC, the
resolution is 2
4095.
4.2
The least significant bit or the ideal voltage difference
between two successive codes.
EQUATION 4-1:
4.3
INL error is the maximum deviation between an actual
code transition point and its corresponding ideal
transition point (straight line).
curve of the MCP4725. The end-point method is used
for the calculation. The INL error at a given input DAC
code is calculated as:
EQUATION 4-2:
© 2009 Microchip Technology Inc.
Where:
Where:
V
V
V
REF
OUT
Ideal
LSB
n
Ideal
TERMINOLOGY
Resolution
LSB
Integral Nonlinearity (INL) or
Relative Accuracy
=
=
=
=
=
12
INL
V
------------ -
The reference voltage = V
MCP4725. This V
full scale voltage range
The number of digital input bits.
(n = 12 for MCP4725)
Code*LSB
The output voltage measured at
the given input code
or the DAC code ranges from 0 to
2
REF
n
=
=
(
-------------------------------------- -
V
(
----------------------------------------------------------------- -
V
OUT
Full Scale
LSB
Figure 2-5
V
Ideal
2
REF
n
)
V
1
is the ideal
Zero Scale
shows the INL
DD
in the
)
FIGURE 4-1:
4.4
Differential nonlinearity error
measure of step size between codes in actual transfer
function. The ideal step size between codes is 1 LSB.
A DNL error of zero would imply that every code is
exactly 1 LSB wide. If the DNL error is less than 1 LSB,
the DAC guarantees monotonic output and no missing
codes. The DNL error between any two adjacent codes
is calculated as follows:
EQUATION 4-3:
Analog
Output
Where:
(LSB)
ΔV
OUT
6
5
7
1
0
4
3
2
Differential Nonlinearity (DNL)
000
INL = 0.5 LSB
=
001
DNL
The measured DAC output
voltage difference between two
adjacent input codes.
010
Actual Transfer Function
Ideal Transfer Function
=
INL Accuracy.
Δ
--------------------------------- -
011
DAC Input Code
V
INL = - 1 LSB
OUT
LSB
MCP4725
100 101
(Figure
LSB
INL = < -1 LSB
DS22039D-page 15
110
4-2) is the
111

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