PEB4264VV1.2XT Infineon Technologies, PEB4264VV1.2XT Datasheet - Page 282
PEB4264VV1.2XT
Manufacturer Part Number
PEB4264VV1.2XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEB4264VV1.2XT.pdf
(383 pages)
Specifications of PEB4264VV1.2XT
On-hook Transmission
Yes
Polarity Reversal
Yes
On-chip Ring Relay Driver
Yes
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Pin Count
22
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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Preliminary
Bit
The mask bits IO[4:1]-M only influence the generation of an interrupt. Even if the mask
bit is set to 1, the corresponding status bit in the INTREGx registers gets updated to
show the current status of the corresponding event.
IO4-INEN
IO3-INEN
IO2-INEN
IO1-INEN
IO4-M
IO3-M
Data Sheet
12
H
IOCTL1
7
Input enable for programmable IO pin IO4
IO4-INEN = 0 Input Schmitt trigger of pin IO4 is disabled.
IO4-INEN = 1 Input Schmitt trigger of pin IO4 is enabled.
Input enable for programmable IO pin IO3
IO3-INEN = 0 Input Schmitt trigger of pin IO3 is disabled.
IO3-INEN = 1 Input Schmitt trigger of pin IO3 is enabled.
Input enable for programmable IO pin IO2
IO2-INEN = 0 Input Schmitt trigger of pin IO2 is disabled.
IO2-INEN = 1 Input Schmitt trigger of pin IO2 is enabled.
Input enable for programmable IO pin IO1
IO1-INEN = 0 Input Schmitt trigger of pin IO1 is disabled.
IO1-INEN = 1 Input Schmitt trigger of pin IO1 is enabled.
Mask bit for IO4-DU bit
IO4-M = 0
IO4-M = 1
Mask bit for IO3-DU bit
IO3-M = 0
IO3-M = 1
IO[4:1]-INEN
6
IO Control Register 1
Each change of the IO4 bit generates an interrupt.
Changes of the IO4 bit don’t generate interrupts.
Each change of the IO3 bit generates an interrupt.
Changes of the IO3 bit don’t generate interrupts.
5
SLICOFI-2x Command Structure and Programming
4
282
3
2
IO[4:1]-M
0F
H
DuSLIC-S/-S2
1
2000-07-14
0
Y
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