PEB3265FV15XP Infineon Technologies, PEB3265FV15XP Datasheet - Page 148
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PEB3265FV15XP
Manufacturer Part Number
PEB3265FV15XP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEB3265FV15XP.pdf
(383 pages)
Specifications of PEB3265FV15XP
On-hook Transmission
Yes
Polarity Reversal
Yes
On-chip Ring Relay Driver
Yes
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TQFP
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Operating Supply Voltage (max)
3.465V
Operating Supply Voltage (min)
3.135V
Lead Free Status / RoHS Status
Compliant
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Preliminary
5.2.1
Monitor Channel Operation
The monitor channel is used for the transfer of maintenance information between two
functional blocks. Using two monitor control bits (MR and MX) per direction, the data are
transferred in a complete handshake procedure. The MR and MX bits in the fourth byte
(C/I channel) of the IOM-2 frame are used for the handshake procedure of the monitor
channel.
The monitor channel transmission operates on a pseudo-asynchronous basis:
Data transfer (bits) on the bus is synchronized to Frame Sync FSC.
Data flow (bytes) is asynchronously controlled by the handshake procedure.
For example: Data is placed onto the DD-Monitor-Channel by the monitor transmitter of
the master device (DD-MX-Bit is activated, i.e., set to zero). This data transfer will be
repeated within each frame (125 s rate) until it is acknowledged by the SLICOFI-2x
monitor receiver by setting the DU-MR-bit to zero, which is checked by the monitor
transmitter of the master device. The data rate on IOM-2 monitor channels is 4 kb/s.
Figure 65
Data Sheet
Transmitter
IOM-2 Interface Monitor Transfer Protocol
Receiver
Monitor
Monitor
IOM-2 Interface Monitor Transfer Protocol
Master Device
MX
MR
MR
MX
DD
148
DU
SLICOFI-2x
MR
MR
MX
MX
Transmitter
Receiver
Monitor
Monitor
ezm04125.emf
Interfaces
2000-07-14
DuSLIC
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