L80223 LSI, L80223 Datasheet - Page 129

• Manufacturer Part Number: L80223
• Manufacturer: LSI

Specifications of L80223

• Lead Free Status / RoHS Status: Not Compliant

A.4 TP Transmit Output Current Set
a 0.01 Fcapacitor be placed between the center of the series resistor
string and V
signal at the input. This capacitor is also shown in
Figure
To minimize common-mode input noise and to aid in meeting
susceptibility requirements, it may be necessary to add a common-mode
choke on the receive input as well as add common-mode bundle
termination. The qualified transformers mentioned in
common-mode chokes along with the transformers on both the transmit
and receive sides, as shown in
mode bundle termination may be needed and can be achieved when the
receive secondary center tap and the unused pairs in the RJ45
connector are connected to chassis ground through 75-ohm resistors
and a 0.01 Fcapacitor, as shown in
To minimize noise pickup into the receive path in a system or on a PCB,
loading on TPI+/ should be minimized and both inputs should be loaded
equally.
The TPO output current level is set with an external resistor connected
between the REXT pin and GND. This output current is determined from
the following equation, where R is the value of REXT:
Where
Ir
REXT should typically be a 10 k
specified levels. Once REXT is set for the 100 Mb
as shown by the equation above, I
TP Transmit Output Current Set
ef
I
out
A.3.
= 40 mA (100 Mbits/s, UTP)
= 32.6 mA (100 Mbits/s, STP)
= 100 mA (10 Mbits/s, UTP)
= 81.6 mA (10 Mbits/s, STP)
= (10K/R)
DD
to provide an AC ground for attenuating common-mode
Copyright © 2000, 2001, 2002 by LSI Logic Corporation. All rights reserved.
I
ref
Figure A.1
ref
1% resistor to meet IEEE 802.3
is then automatically changed inside
Figure A.1
through
through
its/
Figure
Figure A.1
Table A.2
s and UTP modes
Figure
A.3. common-
all contain
through
A.3.
A-7