DJLXT971ALE.A4 S E001 Cortina Systems Inc, DJLXT971ALE.A4 S E001 Datasheet - Page 3

• Manufacturer Part Number: DJLXT971ALE.A4 S E001
• Manufacturer: Cortina Systems Inc

Specifications of DJLXT971ALE.A4 S E001

• Lead Free Status / RoHS Status: Not Compliant

LXT971A PHY
Datasheet
249414, Revision 5.2
13 September 2007
Contents
1.0
2.0
3.0
4.0
5.0
Cortina Systems
Introduction to This Document .................................................................................................. 10
1.1
1.2
Block Diagram ............................................................................................................................. 11
Ball and Pin Assignments .......................................................................................................... 12
Signal Descriptions ..................................................................................................................... 17
Functional Description................................................................................................................ 24
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
Document Overview ...........................................................................................................10
Related Documents ............................................................................................................ 10
Device Overview ................................................................................................................. 24
5.1.1
5.1.2
Network Media / Protocol Support ...................................................................................... 25
5.2.1
5.2.2
5.2.3
Operating Requirements..................................................................................................... 29
5.3.1
5.3.2
Initialization ......................................................................................................................... 30
5.4.1
5.4.2
5.4.3
5.4.4
Establishing Link ................................................................................................................. 34
5.5.1
5.5.2
MII Operation ...................................................................................................................... 36
5.6.1
5.6.2
5.6.3
5.6.4
5.6.5
5.6.6
5.6.7
100 Mbps Operation ...........................................................................................................42
5.7.1
5.7.2
5.7.3
10 Mbps Operation ............................................................................................................. 49
5.8.1
5.8.2
5.8.3
5.8.4
5.8.5
5.8.6
5.8.7
®
LXT971A Single-Port 10/100 Mbps PHY Transceiver
Comprehensive Functionality ................................................................................ 24
Optimal Signal Processing Architecture.................................................................24
10/100 Network Interface....................................................................................... 25
MII Data Interface .................................................................................................. 27
Configuration Management Interface .................................................................... 27
Power Requirements ............................................................................................. 29
Clock Requirements ..............................................................................................30
MDIO Control Mode and Hardware Control Mode................................................. 31
Reduced-Power Modes ......................................................................................... 32
Reset .....................................................................................................................33
Hardware Configuration Settings ........................................................................... 33
Auto-Negotiation .................................................................................................... 35
Parallel Detection................................................................................................... 36
MII Clocks .............................................................................................................. 37
Transmit Enable..................................................................................................... 39
Receive Data Valid ................................................................................................ 39
Carrier Sense......................................................................................................... 39
Error Signals .......................................................................................................... 40
Collision .................................................................................................................40
Loopback ............................................................................................................... 40
100BASE-X Network Operations ........................................................................... 42
Collision Indication ................................................................................................. 44
100BASE-X Protocol Sublayer Operations............................................................ 45
10BASE-T Preamble Handling .............................................................................. 49
10BASE-T Carrier Sense....................................................................................... 49
10BASE-T Dribble Bits .......................................................................................... 49
10BASE-T Link Integrity Test ................................................................................ 50
Link Failure ............................................................................................................ 50
10BASE-T SQE (Heartbeat) .................................................................................. 50
10BASE-T Jabber .................................................................................................. 50
Contents
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