EGLXT973QCA3V-873168 Cortina Systems Inc, EGLXT973QCA3V-873168 Datasheet - Page 85

• Manufacturer Part Number: EGLXT973QCA3V-873168
• Manufacturer: Cortina Systems Inc

Specifications of EGLXT973QCA3V-873168

• Lead Free Status / RoHS Status: Compliant

LXT973 Transceiver
Datasheet
249426, Revision 6.0
13 July 2007
Figure 33
Table 44
Cortina Systems
10BASE-T Transmit Timing (Parallel Mode)
MII - 10BASE-T Transmit Timing Parameters (Parallel Mode)
®
TXD, TXEN, TXER setup to
TXCLK High
TXD, TXEN, TXER hold from
TXCLK High
TXEN sampled to CRS asserted
TXEN sampled to CRS
de-asserted
TXEN sampled to twisted-pair
output (Tx latency)
1. Typical values are at 25°C, and are for design aid only, are not guaranteed, and are not subject to
LXT973 10/100 Mbps Dual-Port Fast Ethernet PHY Transceiver
Twisted-Pair
Note:
production testing.
TXCLK
Output
TXEN,
TXER
TXD,
CRS
Parameter
Twisted-pair output default pins are as follows: DPAP/N_0 and DPBP/N_1.
t
1
t
3
Sym
t1
t2
t3
t4
t5
t
5
Min
10
0
–
–
–
Typ
575
5.5
–
–
5
1
t
2
Max
–
–
–
–
–
t
4
Units
BT
BT
ns
ns
ns
15.0 Timing Diagrams
Conditions
Test
–
–
–
–
–
Page 85