S19233PBIFB Applied Micro Circuits Corporation, S19233PBIFB Datasheet - Page 20

• Manufacturer Part Number: S19233PBIFB
• Manufacturer: Applied Micro Circuits Corporation

Specifications of S19233PBIFB

• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

S19233 – 10 G Ethernet/Fibre Channel/SONET/SDH
Dual CDR
I2C SERIAL CONTROL INTERFACE REGISTER MAP SUMMARY
Table 11 below contains the register map summary for the S19233. For detailed register descriptions, please consult the S19233 - Program-
mer’s Reference Manual: PRM2001. When programming the S19233 device, care should be take to preserve the default state of all
RESERVED register bits - see note below.
Register Access Type Definitions
Table 11. Register Map Summary
20
Address
(hex)
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
•
•
•
RW = Read/Write Access
RO = Read Only Access
N/A = Access Type Not Applicable
0010 0100
0001 0111
0001 100x
0001 100x
0000 1101
0111 1011
Default
Value
-
-
a
Field
7:0
4:3
4:2
7:0
5:3
2:0
Bit
4
2
1
0
7
5
4
3
0
7
5
4
3
0
7
6
5
2
1
0
RESERVED
SDPOL
LOS_SD
XLEB
OLEB
RX_CDRBYC
RX_POLINV
RX_I2CRSTB
LCKREFXB
RXLOCK
TX_CDRBYC
TX_POLINV
TX_I2CRSTB
LCKREFTXB
TXLOCK
RX_SQ_POL
RX_SQ_EN
RX_SQ_CNTL
RX_SQ
TX_SQ_POL
TX_SQ_EN
TX_SQ_CNTL
RX_CLKOFFSET
RESERVED
RX_OUTPUT_SLEW
TX_OUTPUT_SLEW
Register Name
Mode
N/A
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
N/A
RW
RW
RO
RO
RESERVED
Signal Detect Polarity for LOS_SD (Active High)
LOS_SD Pin Configured as LOS or SD (LOS)
XFI (Electrical Side) Line Loopback (Disabled)
Optical (Optical Side) Line Loopback (Disabled)
RX CDR Bypass (Disabled)
RX Output Polarity Invert (Non-Inverted)
RX Reset (Disabled)
Force RX to Lock to Reference (disabled)
RX Lock Status
TX CDR Bypass (Disabled)
TX Output Polarity Invert (Non-Inverted)
TX Reset (Disabled)
Force TX to Lock to Reference (Disabled)
TX Lock Status
RX Squelch Polarity (Low)
RX Squelch Enable (Enabled, see Table 3)
RX Squelch Control (Enabled, see Table 3)
RX Squelch Control (see Table 3)
TX Squelch Polarity (active low)
TX Squelch Enable (Enabled, see Table 4)
TX Squelch Control (see Table 4)
RX Clock Phase Offset
RESERVED
RX Output Slew Rate Control
TX Output Slew Rate Control
Revision 5.00 – March 16, 2007
AMCC Confidential and Proprietary
Description
Data Sheet