LAN9217-MT Standard Microsystems (SMSC), LAN9217-MT Datasheet - Page 44
LAN9217-MT
Manufacturer Part Number
LAN9217-MT
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9217-MT.pdf
(139 pages)
Specifications of LAN9217-MT
Operating Supply Voltage (typ)
3.3V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Lead Free Status / RoHS Status
Compliant
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Revision 2.7 (03-15-10)
The process is complete. The LAN9217 is now operational using the newly selected MII device.
The above procedure must be repeated each time the MII port is switched. The procedure is identical
when switching from internal PHY to external MII, or vice-versa.
Set EXT_PHY_SEL described in
the desired MII port. This step switches the RXD[3:0], RX_DV, RX_ER, TXD[3:0], TX_EN, CRS
and COL signals to the desired port.
Set PHY_CLK_SEL described in
the desired port. This must be the same port that is selected by EXT_PHY_SEL.
The host must wait a period of time of not less than 5 cycles of the slowest, newly enabled clock
before executing the next step in this procedure.
Enable the LAN9217 transmitter.
Enable the LAN9217 receiver.
and will determine the required wait-time. In this case the TX_CLK and RX_CLK period for
the internal PHY is 400ns, therefore the host must wait 2us (5*400ns) before proceeding. If
the clocks of the device being deselected by the switch are not running, they are not
considered in this calculation.
DATASHEET
Section 5.3.9, "HW_CFG—Hardware Configuration Register"
Section 5.3.9, "HW_CFG—Hardware Configuration Register"
16-bit High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX Support
44
SMSC LAN9217
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