LAN9210-ABZJ Standard Microsystems (SMSC), LAN9210-ABZJ Datasheet - Page 146

• Manufacturer Part Number: LAN9210-ABZJ
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9210-ABZJ

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / RoHS Status: Compliant

Chapter 9 Revision History
Revision 2.7 (03-15-10)
REVISION LEVEL & DATE
(03-15-10)
(10-24-08)
(08-18-08)
(06-19-08)
(06-10-08)
(11-13-08)
Rev. 2.7
Rev. 2.5
Rev. 2.4
Rev. 2.3
Rev. 2.2
Rev. 2.2
Chapter 2, "Pin Description
and Configuration," on
page 14
Section 7.2, "Operating
Conditions**," on page 137
Section 7.2, "Operating
Conditions**," on page 137
All
All
Table 7.1 on page
Table 7.2 on page
Table 7.3 on page 140
Table 7.4, “I/O Buffer
Characteristics,” on
page 141
Section 3.8, "General
Purpose Timer (GP Timer),"
on page 36
Section 5.3.23, "E2P_CMD
– EEPROM Command
Register," on page 101
Table 7.7 on page 143
Note 7.6 on page 142
Figure 1.2, "Internal Block
Diagram"
Table 2.4, “System and
Power Signals,” on page 17
Auto-negotiation
Advertisement on page 119
SECTION/FIGURE/ENTRY
Table 9.1 Customer Revision History
DATASHEET
139, and
138,
146
Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
Added pin 1 designator to pin diagram
Added note: “Do not drive input signals without
power supplied to the device.”
Added note: “Apply and remove power to all power
supply pins simultaneously, including the Ethernet
magnetics. Do not apply power to individual supply
pins without the others.”
Fixed various typos
Fixed various typos
Updated power consumption and supply current
characteristics tables.
Added input capacitance values.
Changed incorrect “GPT_CNT” reference to
“GPT_LOAD”: “On a reset, or when the
TIMER_EN bit changes from set ‘1’ to cleared ‘0,’
the GPT_LOAD field is initialized to FFFFh.”
Corrected MAC Address Loaded (bit 8) type from
“RO” to “R/WC”
Updated crystal specifications:
Drive Level: 300uW
ESR: 50 Ohms.
Note following I/O Buffer Characteristics table
modified:
Changed from: ".....the per-pin input leakage is 10
divided by the maximum input leakage current."
to: ".....the per-pin input leakage is the maximum
input leakage current divided by 10."
Diagram redone.
The word “Core” was added to the regulator block
title.
Changed VDD_CORE/VDD18CORE bulk
capacitor value from 10uF to 4.7uF.
Bits 9 and 15 relabeled as Reserved, Read-Only
(RO), with a default of 0.
CORRECTION
SMSC LAN9210
Datasheet