TXC-03303-ARPQ Transwitch Corporation, TXC-03303-ARPQ Datasheet - Page 49

• Manufacturer Part Number: TXC-03303-ARPQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-03303-ARPQ

• Lead Free Status / RoHS Status: Compliant

TEST ACCESS PORT
Introduction
The IEEE 1149.1 Standard defines the requirements of a boundary scan architecture that has been specified
by the IEEE Joint Test Action Group (JTAG). Boundary scan is a specialized scan architecture that provides
observability and controllability for the interface pins of the device. The Test Access Port Block, which imple-
ments the boundary scan functions, consists of a Test Access Port (TAP) controller, instruction and data regis-
ters, and a boundary scan register path bordering the input and output pins, as illustrated in Figure 17. The
boundary scan test bus interface consists of four input signals (i.e., the Test Clock (TCK), Test Mode Select
(TMS), Test Data Input (TDI) and Test Reset (TRS) input signals) and a Test Data Output (TDO) output signal.
A brief description of boundary scan operation is provided below; further information is available in the IEEE
Standard document.
The TAP controller receives external control information via a Test Clock (TCK) signal, a Test Mode Select
(TMS) signal, and a Test Reset (TRS) signal, and it sends control signals to the internal scan paths. The scan
path architecture consists of a three-bit serial instruction register and two or more serial data registers. The
instruction and data registers are connected in parallel between the serial Test Data Input (TDI) and Test Data
Output (TDO) signals. The Test Data Input (TDI) signal is routed to both the instruction and data registers and
is used to transfer serial data into a register during a scan operation. The Test Data Output (TDO) is selected
to send data from either register during a scan operation.
When boundary scan testing is not being performed, the boundary scan register is transparent, allowing the
input and output signals at the device pins to pass to and from the M13E device’s internal logic, as illustrated in
Figure 17. During boundary scan testing, the boundary scan register disables the normal flow of input and out-
put signals to allow the device to be controlled and observed via scan operations. A timing diagram for the
boundary scan feature is provided in Figure 16.
Boundary Scan Support
The maximum frequency the M13E device will support for boundary scan is 10 MHz. The M13E device per-
forms the following boundary scan test instructions:
It should be noted that the Capture - IR State (INSTRUCTION_CAPTURE attribute of BSDL) is “101”.
EXTEST Test Instruction:
One of the required boundary scan tests is the external boundary test (EXTEST) instruction. When this instruc-
tion is shifted in, the M13E device is forced into an off-line test mode. While in this test mode, the test bus can
shift data through the boundary scan registers to control the external M13E input and output leads.
SAMPLE/PRELOAD Test Instruction:
When the SAMPLE/PRELOAD instruction is shifted in, the M13E device remains fully operational. While in this
test mode, M13E input data, and data destined for device outputs, can be captured and shifted out for inspec-
tion. The data is captured in response to control signals sent to the TAP controller.
BYPASS Test Instruction:
When the BYPASS instruction is shifted in, the M13E device remains fully operational. While in this test mode,
a scan operation will transfer serial data from the TDI input, through an internal scan cell, to the TDO pin. The
purpose of this instruction is to abbreviate the scan path through the circuits that are not being tested to only a
single clock delay.
- EXTEST (000)
- SAMPLE/PRELOAD (010)
- BYPASS (111)
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Ed. 4, August 1998
TXC-03303
TXC-03303-MB
M13E