LAN9311-NU Standard Microsystems (SMSC), LAN9311-NU Datasheet - Page 438

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LAN9311-NU

Manufacturer Part Number
LAN9311-NU
Description
TWO PORT 10/100 MANAGED ETHERNET SWITCH
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9311-NU

Lead Free Status / RoHS Status
Compliant

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Revision 1.7 (06-29-10)
14.5.4.26
BITS
31:1
0
RESERVED
Interrupt Mask
When set, this bit masks interrupts from the Buffer Manager. The status bits
in the
Buffer Manager Interrupt Mask Register (BM_IMR)
This register contains the Buffer Manager interrupt mask, which masks the interrupts in the
Manager Interrupt Pending Register
the Interrupt Mask bit. Clearing this bit will unmask the interrupts. Refer to
Interrupts," on page 49
Buffer Manager Interrupt Pending Register (BM_IPR)
Register #:
for more information.
1C20h
DESCRIPTION
DATASHEET
(BM_IPR). All Buffer Manager interrupts are masked by setting
438
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Size:
are not affected.
32 bits
TYPE
R/W
SMSC LAN9311/LAN9311i
RO
Chapter 5, "System
DEFAULT
Datasheet
1b
-
Buffer

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