XC3S250E-4FT256C Xilinx Inc, XC3S250E-4FT256C Datasheet - Page 159
XC3S250E-4FT256C
Manufacturer Part Number
XC3S250E-4FT256C
Description
FPGA Spartan®-3E Family 250K Gates 5508 Cells 572MHz 90nm (CMOS) Technology 1.2V 256-Pin FTBGA
Manufacturer
Xilinx Inc
Datasheet
1.XC3S100E-4VQG100C.pdf
(233 pages)
Specifications of XC3S250E-4FT256C
Package
256FTBGA
Family Name
Spartan®-3E
Device Logic Cells
5508
Device Logic Units
612
Device System Gates
250000
Number Of Registers
4896
Maximum Internal Frequency
572 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
172
Ram Bits
221184
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC3S250E-4FT256C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
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Table 121: Configuration Timing Requirements for Attached Parallel NOR Flash
Table 122: MultiBoot Trigger (MBT) Timing
DS312-3 (v3.8) August 26, 2009
Product Specification
Notes:
1.
2.
3.
Notes:
1.
T
(t
T
(t
T
(t
T
(t
Symbol
ACC
OE
CE
ELQV
GLQV
AVQV
BYTE
FLQV,
Symbol
T
These requirements are for successful FPGA configuration in BPI mode, where the FPGA provides the CCLK frequency. The post
configuration timing can be different to support the specific needs of the application loaded into the FPGA and the resulting clock source.
Subtract additional printed circuit board routing delay as required by the application.
The initial BYTE# timing can be extended using an external, appropriately sized pull-down resistor on the FPGA’s LDC2 pin. The resistor
value also depends on whether the FPGA’s HSWAP pin is High or Low.
MultiBoot re-configuration starts on the rising edge after MBT is Low for at least the prescribed minimum period.
MBT
)
)
)
t
FHQV
R
)
MultiBoot Trigger (MBT) Low pulse width required to initiate
MultiBoot reconfiguration
Parallel NOR Flash PROM chip-select
time
Parallel NOR Flash PROM
output-enable time
Parallel NOR Flash PROM read access
time
For x8/x16 PROMs only: BYTE# to
output valid time
Description
(3)
Description
www.xilinx.com
T
ACC
≤
0.5T
CCLKn min
T
T
T
BYTE
CE
OE
Requirement
(
≤
≤
≤
T
Minimum
T
)
T
DC and Switching Characteristics
INITADDR
INITADDR
–
300
INITADDR
T
CCO
–
T
DCC
Maximum
–
∞
PCB
Units
Units
ns
ns
ns
ns
ns
159
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