XC95144XL-10CS144I Xilinx Inc, XC95144XL-10CS144I Datasheet - Page 9

• Manufacturer Part Number: XC95144XL-10CS144I
• Description: CPLD XC9500XL Family 3.2K Gates 144 Macro Cells 100MHz 0.35um (CMOS) Technology 3.3V 144-Pin CSBGA
• Manufacturer: Xilinx Inc

Specifications of XC95144XL-10CS144I

• Package: 144CSBGA
• Family Name: XC9500XL
• Device System Gates: 3200
• Maximum Propagation Delay Time: 10 ns
• Number Of User I/os: 117
• Number Of Logic Blocks/elements: 8
• Typical Operating Supply Voltage: 3.3 V
• Maximum Operating Frequency: 100 MHz
• Number Of Product Terms Per Macro: 90
• Memory Type: Flash
• Operating Temperature: -40 to 85 °C

The internal logic of the product term allocator is shown in
Figure
DS054 (v2.5) May 22, 2009
Product Specification
8.
R
From Lower
From Upper
Macrocell
Macrocell
Figure 8: Product Term Allocator Logic
Macrocell
To Lower
Macrocell
To Upper
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XC9500XL High-Performance CPLD Family Data Sheet
Product Term
Allocator
Product Term Set
Product Term Clock
Product Term Reset
Product Term OE
1
0
Global Set/Reset
Global Set/Reset
Global Clocks
D/T
CE
DS054_08_042101
S
R
Q
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