74LVC125APW-T NXP Semiconductors, 74LVC125APW-T Datasheet - Page 3

• Manufacturer Part Number: 74LVC125APW-T
• Description: Buffer/Line Driver 4-CH Non-Inverting 3-ST CMOS 14-Pin TSSOP T/R
• Manufacturer: NXP Semiconductors

Specifications of 74LVC125APW-T

• Package: 14TSSOP
• Logic Family: LVC
• Logic Function: Buffer/Line Driver
• Number Of Outputs Per Chip: 4
• Output Type: 3-State
• Input Signal Type: Single-Ended
• Maximum Propagation Delay Time @ Maximum Cl: 2.4(Typ)@3.3V ns
• Tolerant I/os: 5 V
• Typical Quiescent Current: 0.1 uA
• Polarity: Non-Inverting

Philips Semiconductors
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
PINNING
2003 May 07
Quad buffer/line driver with 5 V tolerant input/outputs;
3-state
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
PIN
10
11
12
13
14
1
2
3
4
5
6
7
8
9
1OE
1A
1Y
2OE
2A
2Y
GND
3Y
3A
3OE
4Y
4A
4OE
V
SYMBOL
CC
nOE
H
L
L
data enable input (active LOW)
data input
data output
data enable input (active LOW)
data input
data output
ground (0 V)
data output
data input
data enable input (active LOW)
data output
data input
data enable input (active LOW)
supply voltage
DESCRIPTION
INPUT
nA
H
X
L
3
Fig.1 Pin configuration SO14 and (T)SSOP14.
GND
1OE
2OE
1A
1Y
2A
2Y
1
2
3
4
5
6
7
125
MNA226
OUTPUT
14
13
12
11
10
9
8
nY
Product specification
H
Z
74LVC125A
L
V CC
4OE
4A
4Y
3OE
3A
3Y