SCANSTAEVK/NOPB National Semiconductor, SCANSTAEVK/NOPB Datasheet - Page 10

• Manufacturer Part Number: SCANSTAEVK/NOPB
• Manufacturer: National Semiconductor

Specifications of SCANSTAEVK/NOPB

• Lead Free Status / RoHS Status: Compliant

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Address Type
Direct Address
Interrogation Address 3A
Broadcast Address
Multi-Cast Group 0
Multi-Cast Group 1
Multi-Cast Group 2
Multi-Cast Group 3
Level 1 Protocol (Addressing Modes)
Note 4: Hex addresses 80’ to FF’ are only available when using the eighth address bit in the HDL version of the SCANSTA111. The Silicon part has seven address
lines and will treat the most-significant address bit as a don’t care.
The SCANSTA111 supports single and multiple modes of
addressing a ’STA111. The single mode selects one ’STA111
and is called Direct Addressing. More than one ’STA111
device can be selected via the Broadcast and Multi-Cast
Addressing modes.
DIRECT ADDRESSING: The ’STA111 enters the Wait-For-
Address state when:
1. its TAP Controller enters the Test-Logic-Reset state, or
2. its instruction register is updated with the GOTOWAIT
Each ’STA111 within a scan network must be statically con-
figured with a unique address via its S
’STA111 controller is in the Wait-For-Address state, data
shifted into bits 6 through 0 of the instruction register is
compared with the address present on the S
Update-IR state. If the seven (7) LSBs of the instruction
register match the address on the S
6) the ’STA111 becomes selected, and is ready to receive
Level 2 Protocol (i.e., further instructions). When the
’STA111 is selected, its device identification register is in-
serted into the active scan chain.
All ’STA111s whose S
struction register address become unselected. They will re-
main unselected until either their TAP Controller enters the
instruction (while either selected or unselected).
FIGURE 6. Direct Addressing: Device Address Loaded into Instruction Register
Hex Address
00 to 39,
40 to 7F.
(80 to FF (Note 4))
3B
3C
3D
3E
3F
(0-6)
address does not match the in-
(0-6)
(0-6)
inputs, (see Figure
TABLE 4. SCANSTA111 Address Modes
inputs. While the
(0-6)
Binary Address
00000000 to 00111010
01000000 to 01111111
(10000000 to 11111111(Note 4))
00111010
00111011
00111100
00111101
00111110
00111111
inputs in the
10
Test-Logic-Reset state, or their instruction register is up-
dated with the GOTOWAIT instruction.
BROADCAST ADDRESSING:
The Broadcast Address allows a tester to simultaneously
select all ’STA111s in a test network. This mode is useful in
testing systems which contain multiple identical boards. To
avoid bus contention between scan-path output drivers on
different boards, each ’STA111’s TDO
STATEd while in Broadcast mode. In this configuration, the
on-chip Linear Feedback Shift Register (LFSR) can be used
to accumulate a test result signature for each board that can
be read back later by direct-addressing each board’s
’STA111.
MULTICAST ADDRESSING:
As a way to make the broadcast mechanism more selective,
the ’STA111 provides a Multi-cast addressing mode. A
’STA111’s multi-cast group register (MCGR) can be pro-
grammed to assign that ’STA111 to one of four (4) Multi-Cast
groups. When ’STA111s in the Wait-For-Address state are
updated with a Multi-Cast address, all ’STA111s whose
MCGR matches the Multi-Cast group will become selected.
As in Broadcast mode, TDO
Multi-cast mode.
TDO
Normal IEEE Std. 1149.1
Force strong 0’ or weak 1’ as ones-complement
address is shifted out.
Always TRI-STATED
Always TRI-STATED
Always TRI-STATED
Always TRI-STATED
Always TRI-STATED
B
State
B
is always TRI-STATEd while in
B
buffer is always TRI-
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