SA58640DK NXP Semiconductors, SA58640DK Datasheet - Page 4

• Manufacturer Part Number: SA58640DK
• Description: Up-Down Converters NB FM IF RECEIVER
• Manufacturer: NXP Semiconductors

Specifications of SA58640DK

• Maximum Input Frequency: 100 MHz
• Mounting Style: SMD/SMT
• Maximum Power Gain: 17 dB
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Package / Case: SSOP-20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SA58640DK,112

NXP Semiconductors
8. Functional description
1.
SA58640
Product data sheet
dBV = 20 log V
o
/ V
i
.
The SA58640 is an IF signal processing system suitable for second IF systems with input
frequency as high as 100 MHz. The bandwidth of the IF amplifier and limiter is at least
2 MHz with 90 dB of gain. The gain/bandwidth distribution is optimized for 455 kHz,
1.5 kΩ source applications. The overall system is well-suited to battery operation as well
as and high quality products of all types.
The input stage is a Gilbert cell mixer with oscillator. Typical mixer characteristics include
a noise figure of 7.0 dB, conversion gain of 17 dB, and input third-order intercept of
−10 dBm. The oscillator will operate in excess of 100 MHz in LC tank configurations.
Hartley or Colpitts circuits can be used up to 100 MHz for crystal configurations.
The output impedance of the mixer is a 1.5 kΩ resistor permitting direct connection to a
455 kHz ceramic filter. The input resistance of the limiting IF amplifiers is also 1.5 kΩ. With
most 455 kHz ceramic filters and many crystal filters, no impedance matching network is
necessary. The IF amplifier has 44 dB of gain and 5.5 MHz bandwidth. The IF limiter has
58 dB of gain and 4.5 MHz bandwidth. To achieve optimum linearity of the log signal
strength indicator, there must be a 12 dBV
stages. If the IF filter or interstage network does not cause 12 dBV insertion loss, a fixed
or variable resistor or an L pad for simultaneous loss and impedance matching can be
added between the first IF output (pin 16) and the interstage network. The overall gain will
then be 90 dB with 2 MHz bandwidth.
The signal from the second limiting amplifier goes to a Gilbert cell quadrature detector.
One port of the Gilbert cell is internally driven by the IF. The other output of the IF is
AC-coupled to a tuned quadrature network. This signal, which now has a 90° phase
relationship to the internal signal, drives the other port of the multiplier cell.
The demodulated output of the quadrature drives an internal op amp. This op amp can be
configured as a unity gain buffer, or for simultaneous gain, filtering, and second-order
temperature compensation if needed. It can drive an AC load as low as 10 kΩ with a
rail-to-rail output.
A log signal strength indicator completes the circuitry. The output range is greater than
70 dB and is temperature compensated. This signal drives an internal op amp. The
op amp is capable of rail-to-rail output. It can be used for gain, filtering, or second-order
temperature compensation of the RSSI, if needed.
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 12 April 2011
1
insertion loss between the first and second IF
Low-voltage mixer FM IF system
SA58640
© NXP B.V. 2011. All rights reserved.
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