MAX2051ETP+ Maxim Integrated Products, MAX2051ETP+ Datasheet - Page 15

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MAX2051ETP+

Manufacturer Part Number
MAX2051ETP+
Description
RF Mixer SiGe High-Linearity Mixer w/LO Buffer
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX2051ETP+

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
IIP3 linearity and spurious performance can be further
optimized by modifying the capacitive loading on the IF
ports. The default component value of 1.3pF for C2 (list-
ed in Table 1) was chosen to provide the best overall
IIP3 linearity response over the entire 50MHz to
1000MHz band. Alternative capacitor values can be
chosen to improve the device’s 2RF-LO, 2LO-2RF, and
3LO-3RF spurious responses at the expense of overall
IIP3 performance. See the relevant curves in the
Typical Operating Characteristics section to evaluate
the IIP3 vs. spurious performance trade-offs.
The MAX2051’s 2RF-LO, 2LO-2RF, and 3LO-3RF spuri-
ous performance can also be improved by increasing
the LO drive level to the device. The Typical Application
Circuit calls for a nominal LO drive level of 0dBm.
However, enhancements in the device’s spurious per-
formance are possible with increased drive levels
extending up to +9dBm. See the relevant curves in the
Typical Operating Characteristics section to evaluate
the spurious performance vs. LO drive level trade-offs.
A properly designed PCB is an essential part of any
RF/microwave circuit. Keep RF signal lines as short as
possible to reduce losses, radiation, and inductance.
IIP3 and Spurious Optimization by
SiGe, High-Linearity, 850MHz to 1550MHz
Up/Downconversion Mixer with LO Buffer
______________________________________________________________________________________
Increased LO Drive Levels
Spurious Optimization by
Layout Considerations
External IF Tuning
The load impedance presented to the mixer must be
such that any capacitance from both IF- and IF+ to
ground is minimized. For the best performance, route
the ground pin traces directly to the exposed pad
under the package. The PCB exposed pad MUST be
connected to the ground plane of the PCB. It is sug-
gested that multiple vias be used to connect this pad to
the lower level ground planes. This method provides a
good RF/thermal-conduction path for the device. Solder
the exposed pad on the bottom of the device package
to the PCB. The MAX2051 evaluation kit can be used as
a reference for board layout. Gerber files are available
upon request at www.maxim-ic.com.
Proper voltage supply bypassing is essential for high-
frequency circuit stability. Bypass each V
the capacitors shown in the Typical Application Circuit
and see Table 1 for descriptions.
The exposed pad (EP) of the MAX2051’s 20-pin thin
QFN package provides a low thermal-resistance path
to the die. It is important that the PCB on which the
MAX2051 is mounted be designed to conduct heat
from the EP. In addition, provide the EP with a low-
inductance path to electrical ground. The EP MUST be
soldered to a ground plane on the PCB, either directly
or through an array of plated via holes.
Exposed Pad RF/Thermal Considerations
Power-Supply Bypassing
CC
pin with
15

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