NCP1252BDR2G ON Semiconductor, NCP1252BDR2G Datasheet - Page 15

• Manufacturer Part Number: NCP1252BDR2G
• Description: IC PWM CTLR CURRENT MODE 8-SOIC
• Manufacturer: ON Semiconductor

Specifications of NCP1252BDR2G

• Frequency - Max: 500kHz
• Pwm Type: Current Mode
• Number Of Outputs: 1
• Duty Cycle: 84%
• Voltage - Supply: 9 V ~ 28 V
• Buck: No
• Boost: No
• Flyback: Yes
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: Yes
• Operating Temperature: -25°C ~ 125°C
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Duty Cycle (max): 80 %
• Mounting Style: SMD/SMT
• Switching Frequency: 92 KHz to 550 KHz
• Maximum Operating Temperature: + 125 C
• Fall Time: 22 ns
• Rise Time: 26 ns
• Synchronous Pin: No
• Topology: Flyback, Forward
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

viewed on a primary side requires a projection over the sense
resistor R
where:
•
•
•
•
•
be applied is δ
to scale down S
Thus the new division ratio is:
when the natural ramp is neglected (Equation 9).
Ramp Compensation Design Example:
•
•
•
•
•
In the NCP1252, the internal ramp swings with a slope of:
In a forward application the secondary−side downslope
Assuming the selected amount of ramp compensation to
Then R
2 switch−Forward Power supply specification:
V
V
L
N
R
Regulated output: 12 V
L
V
Current sense resistor : 0.75 W
Switching frequency : 125 kHz
out
out
out
sense
f
s
f
/N
the freewheel diode forward drop
= 0.7 V (drop voltage on the regulated output)
, the secondary inductor value
is output voltage level
= 27 mH
p
: the sense resistor on the primary side
the transformer turn ratio
comp
sense
S
comp
. Thus:
can be calculated with the same equation used
sense
int
, then we must calculate the division ratio
accordingly:
Ratio +
S
+
int
(V
+
Rsense
out
L
DC
Rcomp
V
R
out
) V
if d
ramp
sense
max
S
f
)
int
natural_comp
F
d
N
N
comp
Ccs
SW
CS
FB
s
p
R
sense
Figure 36. Ramp Compensation Setup
Vdd
Rramp
t d
comp
LEB
(eq. 6)
(eq. 7)
(eq. 8)
http://onsemi.com
å Ratio +
Buffered
Ramp
15
2R
R
take into account the natural primary ramp created by the
transformer magnetizing inductance. In some case
illustrated here after the power supply does not need
additional ramp compensation due to the high level of the
natural primary ramp.
formula:
Then the natural ramp compensation will be:
than the ramp compensation needed (δ
supply does not need additional ramp compensation. If not,
only the difference (δ
calculate the accurate compensation value.
•
•
•
•
•
•
S
A few line of algebra determined Rcomp:
The previous ramp compensation calculation does not
The natural primary ramp is extracted from the following
If the natural ramp compensation (δ
sense
V
power supply works.
Duty cycle max: DC
V
R
Targeted ramp compensation level: 100%
Transformer specification:
ramp
ramp
bulk
(d
− L
− N
−
+
= 350 V, minimum input voltage at which the
= 3.5 V, Internal ramp level.
= 26.5 kW, Internal pull−up resistance
comp
mag
s
/N
S
* d
p
int
= 13 mH
= 0.085
R
natural_comp
d
comp
S
natural_comp
Clock
natural
comp
S
R
+ R
max
Q
Q
+
−δ
= 84%
ramp
)
V
L
natural_comp
mag
bulk
+
1 * Ratio
DRV
path
S
S
R
Ratio
natural
sense
sense
natural_comp
) should be used to
comp
), the power
) is higher
(eq. 12)
(eq. 10)
(eq. 11)
(eq. 9)