NCP1252BDR2G ON Semiconductor, NCP1252BDR2G Datasheet - Page 11

• Manufacturer Part Number: NCP1252BDR2G
• Description: IC PWM CTLR CURRENT MODE 8-SOIC
• Manufacturer: ON Semiconductor

Specifications of NCP1252BDR2G

• Frequency - Max: 500kHz
• Pwm Type: Current Mode
• Number Of Outputs: 1
• Duty Cycle: 84%
• Voltage - Supply: 9 V ~ 28 V
• Buck: No
• Boost: No
• Flyback: Yes
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: Yes
• Operating Temperature: -25°C ~ 125°C
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Duty Cycle (max): 80 %
• Mounting Style: SMD/SMT
• Switching Frequency: 92 KHz to 550 KHz
• Maximum Operating Temperature: + 125 C
• Fall Time: 22 ns
• Rise Time: 26 ns
• Synchronous Pin: No
• Topology: Flyback, Forward
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Startup Sequence:
V
the internal delay timer (SS
internal delay elapses the soft start can be allowed if the BO
pin level is above V
reached or as soon as this level will be reached the soft start
level, the internal timer starts. As the BO pin level is above
the V
sequence is started.
DRV pin
CC(on)
V
V
BO pin
The startup sequence is activated when Vcc pin reaches
SS pin
With the Case #1, when the V
CC
CC(on)
V
BO
pin
BO
level. Once the startup sequence has been activated
threshold at the end of the internal delay, a soft start
120 ms: Internal
delay
V
FBOL
V
BO
skip
V
f
= 0.75 V
level. If the BO pin threshold is
= 6.0 V
= 0.3 V
CASE #1
FB level
delay
CC
Figure 29. Mode of Operation versus the FB Pin Level
Figure 30. Different Startup Sequence Case #1 & #2
) runs. Only when the
pin reaches the V
Soft start
Operation @ T
Skip: DC = 0%
http://onsemi.com
DC
Time
Time
Time
Time
CC(on)
min
DC = DC
Normal Operation:
< DC < DC
11
min
DRV pin
V
V
on_min
BO pin
is allowed. When the soft start is allowed the SS pin is
released from the ground and the current source connected
to this pin sources its current to the external capacitor
connected on SS pin. The voltage variation of the SS pin
divided by 4 gives the same peak current variation on the CS
pin.
pin level is below the V
sequence can not start. A new soft start sequence will start
only when the BO pin reaches the V
CC
SS pin
CC(on)
The following figures illustrate the different startup cases.
With the Case #2, at the end of the internal delay, the BO
V
maxA/B/C
pin
BO
120 ms: Internal
delay
Time
BO
CASE #2
threshold thus the soft start
pulse
No
BO
threshold.
Soft start
Time
Time
Time
Time