PBLS6001D,115 NXP Semiconductors, PBLS6001D,115 Datasheet

LOADSWITCH PNP 60V 1A SOT457

PBLS6001D,115

Manufacturer Part Number
PBLS6001D,115
Description
LOADSWITCH PNP 60V 1A SOT457
Manufacturer
NXP Semiconductors
Series
-r
Datasheet

Specifications of PBLS6001D,115

Package / Case
SC-74-6
Transistor Type
1 NPN Pre-Biased, 1 PNP
Current - Collector (ic) (max)
100mA, 700mA
Voltage - Collector Emitter Breakdown (max)
50V, 60V
Resistor - Base (r1) (ohms)
2.2K
Resistor - Emitter Base (r2) (ohms)
2.2K
Dc Current Gain (hfe) (min) @ Ic, Vce
30 @ 20mA, 5V / 150 @ 500mA, 5V
Vce Saturation (max) @ Ib, Ic
150mV @ 500µA, 10mA / 340mV @ 100mA, 1A
Current - Collector Cutoff (max)
1µA, 100nA
Frequency - Transition
185MHz
Power - Max
600mW
Mounting Type
Surface Mount
Configuration
Dual
Transistor Polarity
NPN/PNP
Typical Input Resistor
2.2 KOhm @ NPN
Typical Resistor Ratio
1 @ NPN
Mounting Style
SMD/SMT
Collector- Emitter Voltage Vceo Max
50 V @ NPN or 60 V @ PNP
Peak Dc Collector Current
100 mA @ NPN or 1000 mA @ PNP
Maximum Operating Temperature
+ 150 C
Minimum Operating Temperature
- 65 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
934059264115
PBLS6001D T/R
PBLS6001D T/R
1. Product profile
1.1 General description
1.2 Features
1.3 Applications
1.4 Quick reference data
PNP low V
Resistor-Equipped Transistor (RET) in a SOT457 (SC-74) small Surface Mounted Device
(SMD) plastic package.
I
I
I
I
I
I
I
I
I
Table 1.
[1]
[2]
Symbol
TR1; PNP low V
V
I
R
TR2; NPN resistor-equipped transistor
V
I
R1
R2/R1
C
O
CEO
CEO
CEsat
PBLS6001D
60 V PNP BISS loadswitch
Rev. 02 — 7 September 2009
Low V
Low threshold voltage (< 1 V) compared to MOSFET
Low drive power required
Space-saving solution
Reduction of component count
Supply line switches
Battery charger switches
High-side switches for LEDs, drivers and backlights
Portable equipment
Device mounted on a ceramic Printed-Circuit Board (PCB), Al
Pulse test: t
CEsat
CEsat
Quick reference data
Parameter
collector-emitter voltage
collector current (DC)
collector-emitter saturation
resistance
collector-emitter voltage
output current (DC)
bias resistor 1 (input)
bias resistor ratio
p
(BISS) transistor and resistor-equipped transistor in one package
CEsat
Breakthrough In Small Signal (BISS) transistor and NPN
300 s;
transistor
0.02
Conditions
open base
I
I
open base
C
B
= 100 mA
= 1 A;
2
O
[1]
[2]
3
, standard footprint.
Min
-
-
-
-
-
1.54
0.8
Typ
-
-
255
-
-
2.2
1
Product data sheet
Max
340
50
100
2.86
1.2
60
1
Unit
V
A
m
V
mA
k

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PBLS6001D,115 Summary of contents

Page 1

PBLS6001D 60 V PNP BISS loadswitch Rev. 02 — 7 September 2009 1. Product profile 1.1 General description PNP low V Resistor-Equipped Transistor (RET SOT457 (SC-74) small Surface Mounted Device (SMD) plastic package. 1.2 Features I Low V ...

Page 2

... NXP Semiconductors 2. Pinning information Table 2. Pin Ordering information Table 3. Type number PBLS6001D 4. Marking Table 4. Type number PBLS6001D PBLS6001D_2 Product data sheet Pinning Description emitter TR1 base TR1 output (collector) TR2 GND (emitter) TR2 input (base) TR2 collector TR1 Ordering information Package ...

Page 3

... NXP Semiconductors 5. Limiting values Table 5. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol TR1; PNP low V V CBO V CEO V EBO tot TR2; NPN resistor-equipped transistor V CBO V CEO V EBO tot Per device P tot T stg amb [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. ...

Page 4

... NXP Semiconductors (1) Ceramic PCB, Al (2) FR4 PCB, mounting pad for collector 1cm (3) FR4 PCB, standard footprint Fig 1. 6. Thermal characteristics Table 6. Symbol Per device R th(j-a) TR1; PNP low V R th(j-sp) [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. ...

Page 5

... NXP Semiconductors th(j-a) 0.75 (K/W) 0.5 0. 0.2 0.1 0.05 0. FR4 PCB, standard footprint Fig 2. TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse time; typical values th(j- (K/W) 0.75 0.5 2 0.33 10 0.2 0.1 0.05 10 0.02 0. FR4 PCB, mounting pad for collector 1cm Fig 3. TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse time ...

Page 6

... NXP Semiconductors th(j- (K/W) 0.75 0 0.33 0.2 0.1 0.05 10 0.02 0. Ceramic PCB standard footprint 2 3 Fig 4. TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse time; typical values 7. Characteristics Table unless otherwise specified amb Symbol TR1; PNP low V ...

Page 7

... NXP Semiconductors Table unless otherwise specified amb Symbol off TR2; NPN resistor-equipped transistor I CBO I CEO I EBO CEsat V I(off) V I(on) R1 R2/ [1] Pulse test: t PBLS6001D_2 Product data sheet Characteristics …continued Parameter Conditions delay time Boff rise time turn-on time storage time ...

Page 8

... NXP Semiconductors 600 ( 400 (2) (3) 200 ( 100 C amb ( amb ( amb Fig 5. TR1 (PNP): DC current gain as a function of collector current; typical values 1 (V) 0.8 (1) (2) 0.6 (3) 0 amb ( amb ( 100 C amb Fig 7. TR1 (PNP): Base-emitter voltage as a function of collector current; typical values ...

Page 9

... NXP Semiconductors 2.0 I (mA 31.5 (A) 28.0 24.5 1.6 21.0 1.2 0.8 0.4 0 amb Fig 9. TR1 (PNP): Collector current as a function of collector-emitter voltage; typical values 1 V CEsat ( (1) (2) ( amb ( 100 Fig 11. TR1 (PNP): Collector-emitter saturation voltage as a function of collector current; typical values ...

Page 10

... NXP Semiconductors ( 150 C amb ( amb ( amb Fig 13. TR2 (NPN): DC current gain as a function of collector current; typical values I(on) (V) 10 (1) ( amb ( amb ( 100 C amb Fig 15. TR2 (NPN): On-state input voltage as a function of collector current; typical values PBLS6001D_2 Product data sheet ...

Page 11

... NXP Semiconductors 8. Test information Fig 17. BISS transistor switching time definition Fig 18. Test circuit for switching times PBLS6001D_2 Product data sheet (probe) oscilloscope 450 open 100 ; R C Bon Boff Rev. 02 — 7 September 2009 PBLS6001D 60 V PNP BISS loadswitch input pulse (idealized waveform) ...

Page 12

... NXP Semiconductors 9. Package outline Fig 19. Package outline SOT457 (SC-74) 10. Packing information Table 8. The indicated -xxx are the last three digits of the 12NC ordering code. Type number PBLS6001D [1] For further information and the availability of packing methods, see [2] T1: normal taping [3] T2: reverse taping ...

Page 13

... NXP Semiconductors 11. Soldering Fig 20. Reflow soldering footprint 5.05 Fig 21. Wave soldering footprint PBLS6001D_2 Product data sheet 3.45 1.95 0.95 3.30 2.825 1.60 1.70 3.10 3.20 Dimensions in mm 5.30 1.40 4.30 Dimensions in mm Rev. 02 — 7 September 2009 PBLS6001D 60 V PNP BISS loadswitch ...

Page 14

... PBLS6001D_2 20090907 • Modifications: This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal definitions and disclaimers. No changes were made to the technical content. • Figure 6 “TR1 (PNP): Collector-emitter saturation voltage as a function of collector current; ...

Page 15

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 16

... NXP Semiconductors 15. Contents 1 Product profi 1.1 General description 1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.4 Quick reference data Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Limiting values Thermal characteristics Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 6 8 Test information . . . . . . . . . . . . . . . . . . . . . . . . 11 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 10 Packing information Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 12 Revision history ...

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