LFE3-35EA-6FN484C LATTICE SEMICONDUCTOR, LFE3-35EA-6FN484C Datasheet - Page 64
LFE3-35EA-6FN484C
Manufacturer Part Number
LFE3-35EA-6FN484C
Description
33.3K LUTS, 295 I/O, 1.2V, -6 SPEED, PB-FREE
Manufacturer
LATTICE SEMICONDUCTOR
Datasheet
1.LFE3-150EA-7FN672C.pdf
(136 pages)
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Lattice Semiconductor
LVPECL33
The LatticeECP3 devices support the differential LVPECL standard. This standard is emulated using complemen-
tary LVCMOS outputs in conjunction with a parallel resistor across the driver outputs. The LVPECL input standard
is supported by the LVDS differential input buffer. The scheme shown in Figure 3-3 is one possible solution for
point-to-point signals.
Figure 3-3. Differential LVPECL33
Table 3-3. LVPECL33 DC Conditions
16mA
16mA
V
V
V
Z
R
R
R
V
V
V
V
Z
I
1. For input buffer, see LVDS table.
DC
CCIO
CCIO
OUT
OH
OL
OD
BACK
CCIO
T
CM
S
P
Parameter
(+/-5%)
(+/-5%)
On-chip
= 3.3V
= 3.3V
R
R
Over Recommended Operating Conditions
Output Driver Supply (+/-5%)
Driver Impedance
Driver Series Resistor (+/-1%)
Driver Parallel Resistor (+/-1%)
Receiver Termination (+/-1%)
Output High Voltage
Output Low Voltage
Output Differential Voltage
Output Common Mode Voltage
Back Impedance
DC Output Current
S
S
Off-chip
= 93.1 ohms
= 93.1 ohms
(+/-1%)
(+/-1%)
1
Description
Zo = 100 ohm differential
R
P
Transmission line,
= 196 ohms
(+/-1%)
3-11
R
T
= 100 ohms
DC and Switching Characteristics
(+/-1%)
LatticeECP3 Family Data Sheet
Typical
12.11
100.5
3.30
2.05
1.25
0.80
1.65
196
100
10
93
Off-chip
Units
mA
V
V
V
V
V
On-chip
+
-
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