XC3S500E-4PQ208I Xilinx Inc, XC3S500E-4PQ208I Datasheet - Page 217
![no-image](/images/no-image-200.jpg)
XC3S500E-4PQ208I
Manufacturer Part Number
XC3S500E-4PQ208I
Description
FPGA Spartan®-3E Family 500K Gates 10476 Cells 572MHz 90nm (CMOS) Technology 1.2V 208-Pin PQFP
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet
1.XC3S100E-4VQG100C.pdf
(233 pages)
Specifications of XC3S500E-4PQ208I
Package
208PQFP
Family Name
Spartan®-3E
Device Logic Cells
10476
Device Logic Units
1164
Device System Gates
500000
Number Of Registers
9312
Maximum Internal Frequency
572 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
158
Ram Bits
368640
Number Of Logic Elements/cells
10476
Number Of Labs/clbs
1164
Total Ram Bits
368640
Number Of I /o
158
Number Of Gates
500000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
208-BFQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S500E-4PQ208I
Manufacturer:
XILINX
Quantity:
364
Part Number:
XC3S500E-4PQ208I
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
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Table 152: FG400 Package Pinout (Continued)
DS312-4 (v3.8) August 26, 2009
Product Specification
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
IP_L11P_0
IP_L14N_0
IP_L14P_0
IP_L17N_0/GCLK9
IP_L17P_0/GCLK8
IP_L20N_0
IP_L20P_0
IP_L23N_0
IP_L23P_0
IP_L26N_0
IP_L26P_0
IP_L29N_0
IP_L29P_0
VCCO_0
VCCO_0
VCCO_0
VCCO_0
VCCO_0
VCCO_0
IO_L01N_1/A15
IO_L01P_1/A16
IO_L02N_1/A13
IO_L02P_1/A14
IO_L03N_1/VREF_1
IO_L03P_1
IO_L04N_1
IO_L04P_1
IO_L05N_1
IO_L05P_1
IO_L06N_1
IO_L06P_1
IO_L07N_1
IO_L07P_1
IO_L08N_1/VREF_1
IO_L08P_1
IO_L09N_1
IO_L09P_1
IO_L10N_1
IO_L10P_1
IO_L11N_1
R
XC3S1200E
XC3S1600E
Pin Name
FG400
W20
Ball
G13
G10
H10
D13
U18
U17
U19
R18
R17
U20
R20
N16
N19
N18
N15
B11
B12
B10
B16
F10
T18
T17
V19
V20
T20
P18
P17
P20
P16
G9
G8
C8
D8
D7
E6
E7
A4
A5
B4
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
GCLK
GCLK
VREF
VREF
DUAL
DUAL
DUAL
DUAL
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
www.xilinx.com
Table 152: FG400 Package Pinout (Continued)
Bank
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
IO_L11P_1
IO_L12N_1/A11
IO_L12P_1/A12
IO_L13N_1/VREF_1
IO_L13P_1
IO_L14N_1/A9/RHCLK1
IO_L14P_1/A10/RHCLK0
IO_L15N_1/A7/RHCLK3/
TRDY1
IO_L15P_1/A8/RHCLK2
IO_L16N_1/A5/RHCLK5
IO_L16P_1/A6/RHCLK4/
IRDY1
IO_L17N_1/A3/RHCLK7
IO_L17P_1/A4/RHCLK6
IO_L18N_1/A1
IO_L18P_1/A2
IO_L19N_1/A0
IO_L19P_1
IO_L20N_1
IO_L20P_1
IO_L21N_1
IO_L21P_1
IO_L22N_1
IO_L22P_1
IO_L23N_1
IO_L23P_1
IO_L24N_1/VREF_1
IO_L24P_1
IO_L25N_1
IO_L25P_1
IO_L26N_1
IO_L26P_1
IO_L27N_1
IO_L27P_1
IO_L28N_1
IO_L28P_1
XC3S1200E
XC3S1600E
Pin Name
Pinout Descriptions
FG400
Ball
M15
M18
M17
M19
M16
G20
G16
K14
K13
K20
K16
H19
H15
H16
H18
H17
H20
F16
F19
F20
F18
F17
D20
E20
L19
L16
L14
L15
J20
J16
J13
J14
J17
J18
J19
RHCLK/
RHCLK/
RHCLK/
RHCLK/
RHCLK/
RHCLK/
RHCLK/
RHCLK/
DUAL
DUAL
VREF
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
VREF
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
217
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