XC3S1600E-5FG400C Xilinx Inc, XC3S1600E-5FG400C Datasheet - Page 148

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XC3S1600E-5FG400C

Manufacturer Part Number
XC3S1600E-5FG400C
Description
FPGA Spartan®-3E Family 1.6M Gates 33192 Cells 657MHz 90nm (CMOS) Technology 1.2V 400-Pin FBGA
Manufacturer
Xilinx Inc
Datasheet

Specifications of XC3S1600E-5FG400C

Package
400FBGA
Family Name
Spartan®-3E
Device Logic Cells
33192
Device Logic Units
3688
Device System Gates
1600000
Number Of Registers
29504
Maximum Internal Frequency
657 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
304
Ram Bits
663552

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DC and Switching Characteristics
Table 109: Switching Characteristics for the PS in Variable Phase Mode (Continued)
Notes:
1.
2.
3.
148
The numbers in this table are based on the operating conditions set forth in
The maximum variable phase shift range, MAX_STEPS, is only valid when the DCM is has no initial fixed phase shifting, i.e., the PHASE_SHIFT
attribute is set to 0.
The DCM_DELAY_STEP values are provided at the bottom of
Symbol
Description
www.xilinx.com
Table
105.
Table 77
and
Table
108.
Equation
DS312-3 (v3.8) August 26, 2009
Product Specification
Units
R

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