XC2V80-4FG256C Xilinx Inc, XC2V80-4FG256C Datasheet - Page 96
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XC2V80-4FG256C
Manufacturer Part Number
XC2V80-4FG256C
Description
FPGA Virtex-II™ Family 80K Gates 1152 Cells 650MHz 0.15um/0.12um (CMOS) Technology 1.5V 256-Pin FBGA
Manufacturer
Xilinx Inc
Datasheet
1.XC2V1000-4BG575I.pdf
(318 pages)
Specifications of XC2V80-4FG256C
Package
256FBGA
Family Name
Virtex-IIÂ
Device Logic Units
1152
Device System Gates
80000
Number Of Registers
1024
Maximum Internal Frequency
650 MHz
Typical Operating Supply Voltage
1.5 V
Maximum Number Of User I/os
120
Ram Bits
147456
Available stocks
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Manufacturer:
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Part Number:
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Table 4: Virtex-II Pin Definitions (Continued)
DS031-4 (v3.5) November 5, 2007
Product Specification
Notes:
1. All dedicated pins (JTAG and configuration) are powered by V
PROG_B
DONE
M2, M1, M0
HSWAP_EN
TCK
TDI
TDO
TMS
PWRDWN_B
Other Pins
DXN, DXP
V
RSVD
V
V
V
GND
BATT
CCO
CCAUX
CCINT
Pin Name
R
Input
Input/Output
Input
Input
Input
Input
Output
Input
N/A
Input
N/A
Input
Input
Input
Input
(unsupported)
Direction
Input
Active Low asynchronous reset to configuration logic. This pin has a permanent weak
pull-up resistor.
DONE is a bidirectional signal with an optional internal pull-up resistor. As an output,
this pin indicates completion of the configuration process. As an input, a Low level on
DONE can be configured to delay the start-up sequence.
Configuration mode selection.
Enable I/O pull-ups during configuration.
Boundary Scan Clock.
Boundary Scan Data Input.
Boundary Scan Data Output.
Boundary Scan Mode Select.
Active Low power-down pin (unsupported). Driving this pin Low can adversely affect
device operation and configuration. PWRDWN_B is internally pulled High, which is its
default state. It does not require an external pull-up.
Temperature-sensing diode pins (Anode: DXP, Cathode: DXN).
Decryptor key memory backup supply. Connect V
not used.
Reserved pin - do not connect.
Power-supply pins for the output drivers (per bank).
Power-supply pins for auxiliary circuits.
Power-supply pins for the internal core logic.
Ground.
www.xilinx.com
CCAUX
(independent of the bank V
Description
Virtex-II Platform FPGAs: Pinout Information
BATT
CCO
to V
voltage).
CCAUX
or GND if battery is
Module 4 of 4
4
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