XC2V1000-4FF896I Xilinx Inc, XC2V1000-4FF896I Datasheet - Page 98
![no-image](/images/no-image-200.jpg)
XC2V1000-4FF896I
Manufacturer Part Number
XC2V1000-4FF896I
Description
FPGA Virtex-II™ Family 1M Gates 11520 Cells 650MHz 0.15um/0.12um (CMOS) Technology 1.5V 896-Pin FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-IIr
Datasheet
1.XC2V250-4FGG256C.pdf
(318 pages)
Specifications of XC2V1000-4FF896I
Package
896FCBGA
Family Name
Virtex-IIÂ
Device Logic Units
11520
Device System Gates
1000000
Number Of Registers
10240
Maximum Internal Frequency
650 MHz
Typical Operating Supply Voltage
1.5 V
Maximum Number Of User I/os
432
Ram Bits
737280
Number Of Labs/clbs
1280
Total Ram Bits
737280
Number Of I /o
432
Number Of Gates
1000000
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
896-BBGA, FCBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Logic Elements/cells
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC2V1000-4FF896I
Manufacturer:
XilinxInc
Quantity:
3 000
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Table 5: CS144/CSG144 — XC2V40, XC2V80, and XC2V250
DS031-4 (v3.5) November 5, 2007
Product Specification
Bank
2
2
3
3
3
3
3
3
3
3
3
3
4
4
4
4
4
4
4
4
4
4
4
4
5
5
5
5
5
5
5
5
5
5
5
5
R
IO_L03N_4/D2/ALT_VRP_4
IO_L03P_4/D3/ALT_VRN_4
IO_L03N_5/D4/ALT_VRP_5
IO_L03P_5/D5/ALT_VRN_5
IO_L01N_4/BUSY/DOUT
IO_L02N_4/D0/DIN
IO_L01N_5/RDWR_B
IO_L95N_4/GCLK3S
IO_L96N_4/GCLK1S
IO_L96N_5/GCLK7S
IO_L95N_5/GCLK5S
IO_L95P_4/GCLK2P
IO_L96P_4/GCLK0P
IO_L96P_5/GCLK6P
IO_L95P_5/GCLK4P
IO_L03N_3/VREF_3
IO_L94N_4/VREF_4
IO_L94P_5/VREF_5
IO_L02N_3/VRP_3
IO_L02P_3/VRN_3
IO_L01P_4/INIT_B
IO_L01P_5/CS_B
Pin Description
IO_L02P_4/D1
IO_L02N_5/D6
IO_L02P_5/D7
IO_L96N_2
IO_L96N_3
IO_L94N_3
IO_L01N_3
IO_L94N_5
IO_L96P_2
IO_L96P_3
IO_L94P_3
IO_L03P_3
IO_L01P_3
IO_L94P_4
(1)
(1)
www.xilinx.com
Pin Number
G11
G13
G12
M11
N11
M10
H12
H11
K13
K12
K11
K10
N10
J13
J10
L13
L10
M8
M7
M6
M4
K9
N9
K8
N8
K7
N7
N6
K6
K5
N4
K4
L8
L6
L5
L4
Virtex-II Platform FPGAs: Pinout Information
No Connect in the XC2V40
Module 4 of 4
6
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