XC2V1000-4FF896I Xilinx Inc, XC2V1000-4FF896I Datasheet - Page 54
![no-image](/images/no-image-200.jpg)
XC2V1000-4FF896I
Manufacturer Part Number
XC2V1000-4FF896I
Description
FPGA Virtex-II™ Family 1M Gates 11520 Cells 650MHz 0.15um/0.12um (CMOS) Technology 1.5V 896-Pin FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-IIr
Datasheet
1.XC2V250-4FGG256C.pdf
(318 pages)
Specifications of XC2V1000-4FF896I
Package
896FCBGA
Family Name
Virtex-IIÂ
Device Logic Units
11520
Device System Gates
1000000
Number Of Registers
10240
Maximum Internal Frequency
650 MHz
Typical Operating Supply Voltage
1.5 V
Maximum Number Of User I/os
432
Ram Bits
737280
Number Of Labs/clbs
1280
Total Ram Bits
737280
Number Of I /o
432
Number Of Gates
1000000
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
896-BBGA, FCBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Logic Elements/cells
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC2V1000-4FF896I
Manufacturer:
XilinxInc
Quantity:
3 000
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Extended LVDS DC Specifications (LVDSEXT_33 & LVDSEXT_25)
Table 9: Extended LVDS DC Specifications
LVPECL DC Specifications
These values are valid when driving a 100 Ω differential
load only, i.e., a 100 Ω resistor between the two receiver
pins. The V
levels and are compatible with devices tolerant of lower
Table 10: LVPECL DC Specifications
DS031-3 (v3.5) November 5, 2007
Product Specification
Differential output voltage (Q – Q),
Differential input voltage (Q – Q),
Output High voltage for Q and Q
Output Low voltage for Q and Q
Output common-mode voltage
Input common-mode voltage
Q = High (Q – Q), Q = High
Q = High (Q – Q), Q = High
Supply Voltage
DC Parameter
Differential Input Voltage
OH
R
levels are 200 mV below standard LVPECL
DC Parameter
V
V
V
V
CCO
V
OH
OL
IH
IL
Symbol
V
V
V
V
V
V
ODIFF
V
OCM
IDIFF
CCO
ICM
OH
OL
Common-mode input voltage = 1.25 V
Differential input voltage = ±350 mV
R
R
R
R
T
T
T
T
0.96
1.49
0.86
Min
= 100 Ω across Q and Q signals
= 100 Ω across Q and Q signals
= 100 Ω across Q and Q signals
= 100 Ω across Q and Q signals
0.3
1.8
www.xilinx.com
3.0
Virtex-II Platform FPGAs: DC and Switching Characteristics
Conditions
2.125
Max
2.11
1.27
2.72
–
common-mode ranges.
specifications of LVPECL. For more information on using
LVPECL
1.92
1.06
1.49
0.86
,
Min
0.3
see the Virtex-II User Guide.
3.3
2.125
Max
2.28
1.43
2.72
–
0.705
1.125
Min
440
100
0.2
Table 10
3.3 or 2.5
2.13
1.30
1.49
0.86
Min
0.3
1.200
1.25
Typ
350
summarizes the DC output
3.6
2.125
Max
2.41
1.57
2.72
V
–
CCO
1.785
1.375
Max
820
N/A
– 0.5
Module 3 of 4
Units
V
V
V
V
V
V
Units
mV
mV
V
V
V
V
V
6
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