XC2S300E-6PQG208C Xilinx Inc, XC2S300E-6PQG208C Datasheet - Page 85
![FPGA Spartan®-IIE Family 300K Gates 6912 Cells 357MHz 0.15um Technology 1.8V 208-Pin PQFP](/photos/6/71/67100/pq208_sml.jpg)
XC2S300E-6PQG208C
Manufacturer Part Number
XC2S300E-6PQG208C
Description
FPGA Spartan®-IIE Family 300K Gates 6912 Cells 357MHz 0.15um Technology 1.8V 208-Pin PQFP
Manufacturer
Xilinx Inc
Series
Spartan™-IIEr
Datasheet
1.XC2S50E-6TQG144C.pdf
(108 pages)
Specifications of XC2S300E-6PQG208C
Package
208PQFP
Family Name
Spartan®-IIE
Device Logic Cells
6912
Device Logic Units
1536
Device System Gates
300000
Maximum Internal Frequency
357 MHz
Typical Operating Supply Voltage
1.8 V
Maximum Number Of User I/os
146
Ram Bits
65536
Number Of Logic Elements/cells
6912
Number Of Labs/clbs
1536
Total Ram Bits
65536
Number Of I /o
146
Number Of Gates
300000
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
208-BFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1326
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC2S300E-6PQG208C
Manufacturer:
XILINX
Quantity:
292
Company:
Part Number:
XC2S300E-6PQG208C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC2S300E-6PQG208C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
FG456 Pinouts (XC2S100E, XC2S150E, XC2S200E, XC2S300E, XC2S400E, XC2S600E)
DS077-4 (2.3) June 18, 2008
Product Specification
I/O
(WRITE),
L#N_YY
I/O
I/O
I/O, L#P
I/O, L#N
I/O, L#P
I/O, L#N
I/O
I/O
I/O,
L#P_YY
I/O,
L#N_YY
I/O, VREF
Bank 1,
L#P_YY
I/O,
L#N_YY
I/O
I/O, L#P
I/O, L#N
I/O, L#P
I/O, L#N
I/O
I/O, VREF
Bank 1,
L#P
I/O, L#N
I/O, L#P
Function Bank
Pad Name
R
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
A20
D18
C18
B19
A19
B18
A18
D17
C17
B17
A17
E16
E17
E15
D16
C16
B16
A16
D15
C15
B15
F14
Pin
300E, 400E,
300E, 400E,
200E, 300E,
200E, 300E,
200E, 300E,
200E, 300E,
200E, 300E,
XC2S200E,
XC2S200E,
XC2S100E,
400E, 600E
XC2S100E,
400E, 600E
XC2S300E,
XC2S300E,
XC2S100E,
300E, 600E
XC2S100E,
300E, 600E
XC2S100E,
400E, 600E
XC2S100E,
400E, 600E
XC2S100E,
400E, 600E
Async.
Output
Option
LVDS
600E
600E
600E
600E
All
All
All
All
All
-
-
-
-
-
-
XC2S200E,
400E, 600E
XC2S600E I/O, L16P_Y
Option
300E,
V
All
All
REF
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
I/O, L19P_Y
I/O, L14P_Y
I/O, VREF
I/O, VREF
L20N_YY
L18P_YY
L18N_YY
L17P_YY
L17N_YY
(WRITE),
L19N_Y
L16N_Y
L15P_Y
L15N_Y
Bank 1,
Bank 1,
100E
I/O,
I/O,
I/O,
I/O,
I/O,
I/O,
www.xilinx.com
I/O
I/O
I/O
-
-
-
-
-
-
-
-
I/O, VREF
I/O, VREF
(WRITE),
L26N_YY
I/O, L25P
I/O, L25N
I/O, L24P
I/O, L24N
L23P_YY
L23N_YY
L22P_YY
L22N_YY
I/O, L21P
I/O, L21N
I/O, L20P
I/O, L20N
I/O, L19N
I/O, L18P
Bank 1,
Bank 1,
150E
L19P
I/O,
I/O,
I/O,
I/O
I/O
I/O
I/O
-
-
-
Device-Specific Pinouts: XC2S
I/O, L27P_Y I/O, L27P_Y I/O, L27P_Y I/O, L27P_Y
I/O, L20P_Y I/O, L20P_Y I/O, L20P_Y I/O, L20P_Y
I/O, VREF
I/O, VREF
I/O, VREF
L28N_YY
L25P_YY
L25N_YY
L24P_YY
L24N_YY
I/O, L23N
I/O, L22N
(WRITE),
I/O, L23P
I/O, L22P
L27N_Y
L26P_Y
L26N_Y
L21P_Y
L21N_Y
Bank 1,
Bank 1,
Bank 1,
200E
I/O,
I/O,
I/O,
I/O,
I/O,
I/O,
I/O
I/O
I/O
I/O
Spartan-IIE FPGA Family: Pinout Tables
-
-
-
I/O, L23P_Y
I/O, L22P_Y
I/O, VREF
I/O, VREF
I/O, VREF
(WRITE),
L28N_YY
L25P_YY
L25N_YY
L24P_YY
L24N_YY
L27N_Y
L26N_Y
L23N_Y
L22N_Y
L21N_Y
L26P_Y
L21P_Y
Bank 1,
Bank 1,
Bank 1,
300E
I/O,
I/O,
I/O,
I/O,
I/O,
I/O,
I/O,
I/O,
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O, VREF
I/O, VREF
I/O, VREF
L28N_YY
L25P_YY
L25N_YY
L24P_YY
L24N_YY
I/O, L23N
I/O, L22N
(WRITE),
I/O, L23P
I/O, L22P
L27N_Y
L26P_Y
L26N_Y
L21P_Y
L21N_Y
Bank 1,
Bank 1,
Bank 1,
400E
I/O,
I/O,
I/O,
I/O,
I/O,
I/O,
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O, L23P_Y
I/O, VREF
I/O, VREF
I/O, VREF
I/O, VREF
(WRITE),
L28N_YY
L25P_YY
L25N_YY
L24P_YY
L24N_YY
L27N_Y
L26N_Y
L23N_Y
L22N_Y
L21N_Y
L26P_Y
L22P_Y
L21P_Y
Bank 1,
Bank 1,
Bank 1,
Bank 1,
600E
I/O,
I/O,
I/O,
I/O,
I/O,
I/O,
I/O,
I/O,
I/O
I/O
I/O
I/O
I/O
I/O
I/O
85