XC2S100E-6PQG208C Xilinx Inc, XC2S100E-6PQG208C Datasheet - Page 14
![FPGA Spartan®-IIE Family 100K Gates 2700 Cells 357MHz 0.15um Technology 1.8V 208-Pin PQFP](/photos/6/71/67100/pq208_sml.jpg)
XC2S100E-6PQG208C
Manufacturer Part Number
XC2S100E-6PQG208C
Description
FPGA Spartan®-IIE Family 100K Gates 2700 Cells 357MHz 0.15um Technology 1.8V 208-Pin PQFP
Manufacturer
Xilinx Inc
Series
Spartan™-IIEr
Datasheet
1.XC2S50E-6TQG144C.pdf
(108 pages)
Specifications of XC2S100E-6PQG208C
Package
208PQFP
Family Name
Spartan®-IIE
Device Logic Cells
2700
Device Logic Units
600
Device System Gates
100000
Maximum Internal Frequency
357 MHz
Typical Operating Supply Voltage
1.8 V
Maximum Number Of User I/os
146
Ram Bits
40960
Number Of Logic Elements/cells
2700
Number Of Labs/clbs
600
Total Ram Bits
40960
Number Of I /o
146
Number Of Gates
100000
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
208-BFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Spartan-IIE FPGA Family: Functional Description
Additional Logic
The F5 multiplexer in each slice combines the function gen-
erator outputs
a function generator that can implement any 5-input func-
tion, a 4:1 multiplexer, or selected functions of up to nine
inputs.
14
(Figure
7). This combination provides either
Figure 6: Spartan-IIE CLB Slice (two identical slices in each CLB)
www.xilinx.com
Similarly, the F6 multiplexer combines the outputs of all four
function generators in the CLB by selecting one of the two
F5-multiplexer outputs. This permits the implementation of
any 6-input function, an 8:1 multiplexer, or selected func-
tions of up to 19 inputs.
DS077-2 (v2.3) June 18, 2008
Product Specification
R