XC2C384-7FTG256C Xilinx Inc, XC2C384-7FTG256C Datasheet - Page 3

CPLD CoolRunner™-II Family 9K Gates 384 Macro Cells 217MHz 0.18um (CMOS) Technology 1.8V 256-Pin FTBGA

XC2C384-7FTG256C

Manufacturer Part Number
XC2C384-7FTG256C
Description
CPLD CoolRunner™-II Family 9K Gates 384 Macro Cells 217MHz 0.18um (CMOS) Technology 1.8V 256-Pin FTBGA
Manufacturer
Xilinx Inc
Series
CoolRunner IIr
Datasheets

Specifications of XC2C384-7FTG256C

Package
256FTBGA
Family Name
CoolRunner™-II
Device System Gates
9000
Number Of Macro Cells
384
Maximum Propagation Delay Time
7.5 ns
Number Of User I/os
212
Number Of Logic Blocks/elements
24
Typical Operating Supply Voltage
1.8 V
Maximum Operating Frequency
217 MHz
Number Of Product Terms Per Macro
40
Operating Temperature
0 to 70 °C
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
7.1ns
Voltage Supply - Internal
1.7 V ~ 1.9 V
Number Of Logic Elements/blocks
24
Number Of Macrocells
384
Number Of Gates
9000
Number Of I /o
212
Mounting Type
Surface Mount
Package / Case
256-FTBGA
Features
JTAG
Voltage
1.8V
Memory Type
CMOS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Logic Elements/cells
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1414

Available stocks

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0
Absolute Maximum Ratings
DC Electrical Characteristics
DS095 (v3.2) March 8, 2007
Product Specification
Notes:
1.
2.
3.
Notes:
1.
2.
Recommended Operating Conditions
I
I
I
C
C
C
I
I
CCSB
CCSB
CC
IL
IH
Symbol
JTAG
CLK
IO
(2)
(2)
Symbol
V
Maximum DC undershoot below GND must be limited to either 0.5V or 10 mA, whichever is easiest to achieve. During transitions,
the device pins may undershoot to –2.0v or overshoot to +4.5V, provided this over or undershoot lasts less than 10 ns and with the
forcing current being limited to 200 mA.
Valid over commercial temperature range.
For soldering guidelines and thermal considerations, see the
packages, see XAPP427.
16-bit up/down, Resetable binary counter (one counter per function block).
See Quality and Reliability section of the CoolRunner-II family data sheet.
(1)
Symbol
V
V
V
T
CCAUX
V
V
V
V
JTAG
CCIO
CCAUX
STG
V
CC
CCIO
TS
IN
T
CC
J
(1)
(1)
(3)
(2)
R
Standby current Commercial
Standby current Industrial
Dynamic current
JTAG input capacitance
Global clock input capacitance
I/O capacitance
Input leakage current
I/O High-Z leakage
Supply voltage for internal logic
and input buffers
Supply voltage for output drivers @ 3.3V operation
Supply voltage for output drivers @ 2.5V operation
Supply voltage for output drivers @ 1.8V operation
Supply voltage for output drivers @ 1.5V operation
Supply voltage for JTAG programming
Supply voltage relative to ground
Supply voltage for output drivers
JTAG input voltage limits
JTAG input supply voltage
Input voltage relative to ground
Voltage applied to 3-state output
Storage Temperature (ambient)
Junction Temperature
Parameter
(1)
(Over Recommended Operating Conditions)
Description
Parameter
V
V
www.xilinx.com
Commercial T
Industrial T
V
V
IN
IN
CC
CC
= 0V or V
= 0V or V
Test Conditions
= 1.9V, V
= 1.9V, V
Device Packaging
f = 50 MHz
f = 1 MHz
f = 1 MHz
f = 1 MHz
f = 1 MHz
A
CCIO
CCIO
= –40°C to +85°C
A
CCIO
CCIO
= 0°C to +70°C
to 3.9V
to 3.9V
= 3.6V
= 3.6V
information on the Xilinx website. For Pb free
Typical
44
79
-
-
-
-
-
XC2C384 CoolRunner-II CPLD
–65 to +150
Min
–0.5 to 2.0
–0.5 to 4.0
–0.5 to 4.0
–0.5 to 4.0
–0.5 to 4.0
–0.5 to 4.0
1.7
1.7
3.0
2.3
1.7
1.4
1.7
Value
+150
Max
Max.
+/–1
+/–1
1.9
1.9
3.6
2.7
1.9
1.6
3.6
200
350
1.5
45
10
12
10
Units
Units
°C
°C
V
V
V
V
V
V
V
V
V
V
V
V
V
Units
mA
mA
μA
μA
μA
μA
pF
pF
pF
3

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