MT48H4M32LFB5-75 IT:K Micron Technology Inc, MT48H4M32LFB5-75 IT:K Datasheet - Page 63

• Manufacturer Part Number: MT48H4M32LFB5-75 IT:K
• Description: DRAM Chip Mobile SDRAM 128M-Bit 4Mx32 1.8V 90-Pin VFBGA Tray
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr

Specifications of MT48H4M32LFB5-75 IT:K

• Package: 90VFBGA
• Density: 128 Mb
• Address Bus Width: 14 Bit
• Operating Supply Voltage: 1.8 V
• Maximum Clock Rate: 133 MHz
• Maximum Random Access Time: 8|5.4 ns
• Operating Temperature: -40 to 85 °C

Figure 34: WRITE – DQM Operation
Burst Read/Single Write
PDF: 09005aef832ff1ea
128mb_mobile_sdram_y35M.pdf - Rev. G 10/09 EN
Command
BA0, BA1
Address
DQM
CKE
CLK
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
Bank
T0
Row
Row
t CKH
t CMH
t AH
t AH
t AH
Note:
t RCD
t CK
The burst read/single write mode is entered by programming the write burst mode bit
(M9) in the mode register to a 1. In this mode, all WRITE commands result in the access
of a single column location (burst of one), regardless of the programmed burst length.
READ commands access columns according to the programmed burst length and se-
quence, just as in the normal mode of operation (M9 = 0).
T1
NOP
1. For this example, BL = 4.
Disable auto precharge
Enable auto precharge
t CMS
t CL
t DS
Column m
WRITE
T2
Bank
D
t CMH
IN
t DH
t CH
128Mb: 8 Meg x 16, 4 Meg x 32 Mobile SDRAM
T3
NOP
63
t DS
T4
NOP
Micron Technology, Inc. reserves the right to change products or specifications without notice.
D
IN
t DH
t DS
T5
NOP
D
IN
t DH
©2008 Micron Technology, Inc. All rights reserved.
NOP
T6
WRITE Operation
NOP
T7
Don’t Care