HEF4013BPN NXP Semiconductors, HEF4013BPN Datasheet - Page 3

no-image

HEF4013BPN

Manufacturer Part Number
HEF4013BPN
Description
Flip Flop D-Type Pos-Edge 2-Element 14-Pin PDIP Bulk
Manufacturer
NXP Semiconductors
Datasheet

Specifications of HEF4013BPN

Package
14PDIP
Logic Function
D-Type
Logic Family
HEF4000
Number Of Element Outputs
1
Number Of Elements Per Chip
2
Input Signal Type
Single-Ended
Output Signal Type
Differential
Set/reset
Set/Reset
Typical Operating Supply Voltage
3.3|5|9|12 V
Operating Temperature
-40 to 125 °C
NXP Semiconductors
6. Pinning information
Table 2.
7. Functional description
Table 3.
[1]
HEF4013B_6
Product data sheet
Symbol
1Q, 2Q
1Q, 2Q
1CP, 2CP
1CD, 2CD
1D, 2D
1SD, 2SD
V
V
Control
nSD
H
L
H
L
L
Fig 3.
SS
DD
H = HIGH voltage level; L = LOW voltage level; X = don’t care;
Pin configuration
Pin description
Function table
6.1 Pinning
6.2 Pin description
nCD
L
H
H
L
L
Pin
1, 13
2, 12
3, 11
4, 10
5, 9
6, 8
7
14
[1]
nCP
X
X
X
Description
true output
complement output
clock input (LOW to HIGH edge-triggered)
asynchronous clear-direct input (active HIGH)
data input
asynchronous set-direct input (active HIGH)
ground (0 V)
supply voltage
1CD
1CP
1SD
V
1Q
1Q
1D
SS
Rev. 06 — 27 October 2009
1
2
3
4
5
6
7
HEF4013B
= LOW-to-HIGH clock transition.
001aag085
Input
nD
X
X
X
L
H
14
13
12
11
10
9
8
V
2Q
2Q
2CP
2CD
2D
2SD
DD
Output
nQ
H
L
H
L
H
HEF4013B
Dual D-type flip-flop
© NXP B.V. 2009. All rights reserved.
nQ
L
H
H
H
L
3 of 15

Related parts for HEF4013BPN