74HCT273D-T NXP Semiconductors, 74HCT273D-T Datasheet - Page 5

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74HCT273D-T

Manufacturer Part Number
74HCT273D-T
Description
Flip Flop D-Type Bus Interface Pos-Edge 1-Element 20-Pin SO T/R
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74HCT273D-T

Package
20SO
Logic Function
D-Type Bus Interface
Logic Family
HCT
Number Of Element Outputs
8
Number Of Elements Per Chip
1
Output Signal Type
Single-Ended
Set/reset
Master Reset
Typical Operating Supply Voltage
5 V
Operating Temperature
-40 to 125 °C
Philips Semiconductors
6. Pinning information
74HC_HCT273_3
Product data sheet
6.1 Pinning
6.2 Pin description
Table 3:
Symbol
MR
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
CP
Q4
D4
D5
Fig 5. Pin configuration DIP20, SO20,
GND
MR
SSOP20 and TSSOP20
Q0
D0
D1
Q1
Q2
D2
D3
Q3
Pin description
10
1
2
3
4
5
6
7
8
9
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
74HCT273
74HC273
Rev. 03 — 24 January 2006
001aae053
Description
master reset input (active LOW)
flip-flop output 0
data input 0
data input 1
flip-flop output 1
flip-flop output 2
data input 2
data input 3
flip-flop output 3
ground (0 V)
clock input (LOW-to-HIGH, edge-triggered)
flip-flop output 4
data input 4
data input 5
20
19
18
17
16
15
14
13
12
11
Octal D-type flip-flop with reset; positive-edge trigger
V
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CP
CC
74HC273; 74HCT273
Fig 6. Pin configuration DHVQFN20
(1) The die substrate is attached to this
index area
terminal 1
pad using conductive die attach
material. It can not be used as supply
pin or output.
Q0
Q1
Q2
Q3
D0
D1
D2
D3
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Transparent top view
2
3
4
5
6
7
8
9
74HCT273
74HC273
GND
(1)
19
18
17
16
15
14
13
12
001aae054
Q7
D7
D6
Q6
Q5
D5
D4
Q4
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