85314AGI-11 Integrated Device Technology (Idt), 85314AGI-11 Datasheet - Page 3

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85314AGI-11

Manufacturer Part Number
85314AGI-11
Description
Clock Driver 2-IN LVPECL 20-Pin TSSOP Tube
Manufacturer
Integrated Device Technology (Idt)
Datasheet

Specifications of 85314AGI-11

Package
20TSSOP
Configuration
1 x 2:1
Input Signal Type
HCSL|LVDS|LVHSTL|LVPECL|SSTL
Maximum Output Frequency
700 MHz
Operating Supply Voltage
3.3 V
Function Tables
Table 3A. Control Input Function Table
After nCLK_EN switches, the clock outputs are disabled or enabled following a falling input clock edge as shown in Figure 1. In the
active mode, the state of the outputs are a function of the CLK0, nCLK0 and CLK1, nCLK1 inputs as described in Table 3B.
Figure 1. nCLK_EN Timing Diagram
Table 3B. Clock Input Function Table
ICS85314I-11 Data Sheet
ICS85314AGI-11 REVISION E MAY 4, 2010
nCLK[0:1]
nCLK_EN
CLK[0:1]
nQ[0:4]
CLK0 or CLK1
Q[0:4]
nCLK_EN
0
0
1
1
0
1
Inputs
nCLK0 or nCLK1
CLK_SEL
0
1
0
1
Inputs
1
0
Disabled
Selected Source
CLK0, nCLK0
CLK1, nCLK1
CLK0, nCLK0
CLK1, nCLK1
Q[0:4]
HIGH
LOW
Outputs
3
nQ[0:4]
HIGH
LOW
LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-2.5V, 3.3V LVPECL FANOUT BUFFER
Disabled; LOW
Disabled; LOW
Enabled
Enabled
Q[0:4]
Differential-to-Differential
Differential-to-Differential
Input to Output Mode
Enabled
Outputs
©2010 Integrated Device Technology, Inc.
Disabled; HIGH
Disabled; HIGH
Enabled
Enabled
nQ[0:4]
Non-Inverting
Non-Inverting
Polarity

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