85314AGI-11 Integrated Device Technology (Idt), 85314AGI-11 Datasheet - Page 13

• Manufacturer Part Number: 85314AGI-11
• Description: Clock Driver 2-IN LVPECL 20-Pin TSSOP Tube
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 85314AGI-11

• Package: 20TSSOP
• Configuration: 1 x 2:1
• Input Signal Type: HCSL|LVDS|LVHSTL|LVPECL|SSTL
• Maximum Output Frequency: 700 MHz
• Operating Supply Voltage: 3.3 V

ICS85314I-11 Data Sheet
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS85314I-11.
Equations and example calculations are also provided.
1.
The total power dissipation for the ICS85314I-11 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Total Power_
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and it directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
flow or 200 linear feet per minute and a multi-layer board, the appropriate value is 66.6°C/W per Table 6B below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6A. Thermal Resistance
NOTE: Most modern PCB design use multi-layered boards. The data in the second row pertains to most designs.
Table 6B. Thermal Resistance
NOTE: Most modern PCB design use multi-layered boards. The data in the second row pertains to most designs.
ICS85314AGI-11 REVISION E MAY 4, 2010
Linear Feet per Minute
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
Linear Feet per Minute
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
Power Dissipation.
•
•
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 5 * 30mW = 150mW
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
85°C + 0.454W * 66.6°C/W = 115°C. This is well below the limit of 125°C.
JA
A
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
MAX
(3.6V, with all outputs switching) = 304mW + 150mW = 454mW
MAX
MAX
= V
= 30mW/Loaded Output pair
CC_MAX
θ
θ
JA
JA
* I
EE_MAX
for 20 Lead SOIC, Forced Convection
for 20 Lead TSSOP, Forced Convection
CC
= 3.8V, which gives worst case results.
JA
= 3.8V * 80mA = 304mW
* Pd_total + T
θ
θ
JA
JA
A
114.5°C/W
73.2°C/W
83.2°C/W
46.2°C/W
by Velocity
by Velocity
13
0
0
LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-2.5V, 3.3V LVPECL FANOUT BUFFER
98.0°C/W
66.6°C/W
65.7°C/W
39.7°C/W
200
200
JA
must be used. Assuming a moderate air
©2010 Integrated Device Technology, Inc.
88.0°C/W
63.5°C/W
57.5°C/W
36.8°C/W
500
500