CBTD3384PW NXP Semiconductors, CBTD3384PW Datasheet - Page 7

• Manufacturer Part Number: CBTD3384PW
• Description: Bus Switch 2-Element 5-IN 24-Pin TSSOP Tube
• Manufacturer: NXP Semiconductors

Specifications of CBTD3384PW

• Package: 24TSSOP
• Configuration: 5 x 1:1
• Logic Family: CBT
• Logic Function: Bus Switch
• Number Of Elements Per Chip: 2
• Number Of Outputs Per Chip: 10
• Typical Operating Supply Voltage: 5 V
• Maximum On Resistance: 17(Typ) Ohm
• Maximum High Level Output Current: -128 mA
• Maximum Low Level Output Current: 128 mA
• Maximum Operating Supply Voltage: 5.5 V
• Minimum Operating Supply Voltage: 4.5 V
• Maximum Propagation Delay Time @ Maximum Cl: 0.25@5V ns
• Number Of Bits: 10
• Number Of Elements: 2
• Technology: CMOS
• High Level Output Current: -128mA
• Low Level Output Current: 128mA
• On Resistance: 17Ohm
• Propagation Delay Time: 7ns
• Package Type: TSSOP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Quiescent Current: 1.5mA
• Pin Count: 24
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Compliant

NXP Semiconductors
10. Dynamic characteristics
Table 7.
Voltages are referenced to GND (ground = 0 V). For test circuit see
[1]
[2]
11. Waveforms
CBTD3384
Product data sheet
Symbol Parameter
t
t
t
pd
en
dis
Fig 10. The data input (nAn, nBn) to output (nBn, nAn) propagation delay times
The propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified load capacitance,
when driven by an ideal voltage source (zero output impedance).
t
t
t
pd
en
dis
is the same as t
is the same as t
is the same as t
propagation delay
enable time
disable time
Measurement points are given in
Logic levels: V
Dynamic characteristics
PLH
PZL
PLZ
OL
and t
and t
and t
and V
PZH
PHL
PHZ
OH
.
.
.
Conditions
nAn, nBn to nBn, nAn; see
nOE to nAn or nBn; see
nOE to nAn or nBn; see
are typical output voltage levels that occur with the output load.
V
V
V
nAn, nBn,
nBn, nAn,
CC
CC
CC
output
input
Table
= 5.0 V ± 0.5 V
= 5.0 V ± 0.5 V
= 5.0 V ± 0.5 V
All information provided in this document is subject to legal disclaimers.
GND
V
8.
V
OH
OL
V
I
Rev. 5 — 19 November 2010
10-bit level shifting bus switch with 5-bit output enables
Figure 11
Figure 11
V
M
Figure 10
V
M
t
PHL
Figure
[1][2]
12.
[2]
[2]
001aan063
t
PLH
Min
1.2
1.7
-
T
amb
= −40 °C to +85 °C
Typ
4.3
3.0
-
CBTD3384
© NXP B.V. 2010. All rights reserved.
Max
0.25
7.0
5.3
7 of 17
Unit
ns
ns
ns