PEX 8505-AA25BI PLX Technology, PEX 8505-AA25BI Datasheet - Page 3

• Manufacturer Part Number: PEX 8505-AA25BI
• Description: Versatile PCI Express Switch 196-Pin BGA
• Manufacturer: PLX Technology

Specifications of PEX 8505-AA25BI

• Package: 196BGA

Video Surveillance
A video surveillance application is another example for an
embedded application. When used together with a PEX 8311,
PCI Express-to-local bus bridges, the PEX 8505 can connect
to other embedded devices, such as FPGAs. This allows video
capture devices to interface to a PCI Express host taking
advantage of the PCI Express performance. For more
information on the PCI Express-to-Local Bus bridge, please
visit PLX’s website at www.plxtech.com/bridges.
Printer Application
In a printer application, low power and low latency devices are
commonly used. Figure 5 shows an example of a printer
application. In this example, the low power processor used
provides a limited number of PCI Express ports. The
PEX 8505 can be used to provide four additional PCI Express
ports for the connectivity of other system peripherals such as
Ethernet as well any proprietary PCI Express based ASICs.
The Peer-to-Peer feature in the PEX 8505, allows a peripheral
connected on a downstream port the ability to transfer data
directly to another peripheral device. As shown in Figure 5,
the ASIC connected to the scanner side can transfer data
directly to the PCIe Slot and/or the ASIC connected on the
Marking Engine side resulting in a low latency data transfer.
In this case, the processor is not directly involved in the
transfer.
Camera
Camera
Camera
Camera
Camera
Camera
Camera
Camera
Camera
Camera
Camera
Camera
Camera
Camera
Camera
Camera
Camera
Camera
PCIe TV Tuner Card
PCIe TV Tuner Card
CODEC
CODEC
CODEC
Stereo
Stereo
Stereo
IF
IF
Philips
Philips
Philips
Hybrid
Hybrid
Hybrid
Tuner
Tuner
Tuner
PCIe Sound Card
PCIe Sound Card
JPEG
JPEG
JPEG
JPEG
Figure 4. Video Surveillance
Conexant
Conexant
Conexant
CX22702
CX22702
CX22702
Demod
Demod
Demod
End Point
End Point
Figure 3. I/O Expansion
17242
17242
17242
VIA
VIA
VIA
CVBS
CVBS
2IF
2IF
FIFO
FIFO
FIFO
FIFO
Conexant
Conexant
Conexant
CX23882
CX23882
CX23882
PCI
PCI
Bus
Bus
TS
TS
FPGA
FPGA
FPGA
FPGA
PEX 8111
PEX 8111
PEX 8111
CPU
CPU
CPU
CPU
CPU
CPU
PEX 8505
PEX 8505
PEX 8505
PEX 8311
PEX 8311
PEX 8311
South
South
South
Bridge
Bridge
Bridge
PEX 8111
PEX 8111
PEX 8111
PEX 8311
PEX 8311
PEX 8311
PCI
PCI
Bus
Bus
.
.
.
.
PEX 8505
PEX 8505
PEX 8505
Processor
Processor
Control
Control
www.plxtech.com
Software Usage Model
From a system model viewpoint, each PCI Express port is a
virtual PCI to PCI bridge device with its own set of PCI
Express configuration registers. It is through the upstream port
that the BIOS or host can configure the other ports using
standard PCI enumeration. The virtual PCI to PCI bridges
within the PEX 8505 are compliant to the PCI and PCI
Express system models. The Configuration Space Registers
(CSRs) in a virtual primary/secondary PCI to PCI Bridge are
accessible by type 0 configuration cycles through the virtual
primary bus interface (matching bus number, device number,
and function number).
Interrupt Sources/Events
The ExpressLane PEX 8505 switch supports the INTx
interrupt message type (compatible with the PCI 2.3 Interrupt
signals) or Message Signaled Interrupts (MSI) when enabled.
Interrupts/messages are generated by the PEX 8505 for hot
plug events, baseline error reporting, and advanced error
reporting.
Processor
Processor
Figure 5. Printer Engine
x1
x1
PEX 8505
PEX 8505
PCIe Slot or
PCIe Slot or
Ethernet
Ethernet
Cable
Cable
x1
x1
x1
x1
x1
x1
x1
x1
Proprietary
Proprietary
Proprietary
Proprietary
Marking Engine
Marking Engine
Scanne
Scanne
ASIC
ASIC
ASIC
ASIC
r
r