PEX 8505-AA25BI PLX Technology, PEX 8505-AA25BI Datasheet

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PEX 8505-AA25BI

Manufacturer Part Number
PEX 8505-AA25BI
Description
Versatile PCI Express Switch 196-Pin BGA
Manufacturer
PLX Technology
Datasheet

Specifications of PEX 8505-AA25BI

Package
196BGA
Features
.
PEX 8505 General Features
o 5-lane PCI Express switch
o Up to five ports (x1, x2)
o 15mm x 15mm, 196-ball PBGA pkg.
o Typical Power: 0.8 Watts
PEX 8505 Key Features
o Standards Compliant
o High Performance
o Flexible Configuration
o PCI Express Power Management
o Quality of Service (QoS)
o Reliability, Availability,
- Gen 1 (2.5Gbps) Integrated
- PCI Express Base Specification, r1.1
- PCI Power Management Interface
- Cut-thru with low packet latency
- Max Payload Size of 1024 Bytes
- Non-blocking internal architecture
- Full line rate on all ports
- Five flexible & configurable ports
- Lane and polarity reversal
- Configurable with strapping pins,
- Link power management states: L0,
- Device states: D0 and D3hot
- One Virtual Channel per port
- Eight Traffic Classes per port
- Weighted Round-Robin Ingress Port
Serviceability
- Three Standard Hot-Plug Controllers
- Transaction layer end-to-end CRC
- Poison bit support
- Basic and Advanced Error Reporting
- Per port error diagnostics
- Fatal Error (FATAL_ERR#) signal
- INTA# signal
- Port status bits
- Eight software controllable General
- JTAG boundary scan
SerDes
Specification r1.2
(x1, x2)
EEPROM, I
L0s, L1, L2/L3 Ready and L3
Arbitration
supporting PCI SHPC spec r1.0
support
• Bad DLLPs
• Bad TLPs
• CRC errors and more
(legacy SERR equivalent)
Purpose Output (GPO) signals
Version 1.2 2008
2
C or Host software
Low-Power 5-Lane, 5-Port ExpressLane
The PEX 8505 device offers PCI Express switching capability conforming to the
PCI Express Base specification revision 1.1. This device enables users to add
scalable high bandwidth, non-blocking interconnects at the lowest cost to a wide
variety of applications including communications platforms, consumer products,
servers, storage systems, blade servers, industrial systems and embedded-control
products. The PEX 8505 can be used as a fan-out, or peer-to-peer switch, and is
well-suited for Control Plane Applications, I/O Expansion, Video Surveillance,
M
Systems, Embedded System
Port Configurations
The PEX 8505 offers five lanes and up to five ports supporting x1 and x2 lane
widths. The PEX 8505 features a flexible central packet memory that allocates a
memory buffer for each port as required by the application or endpoint. This buffe
allocation along with the device's flexible packet flow control minimizes
b
match.
High Performance
The PEX 8505 architecture supports packet cut-thru with low latency (138ns).
This, combined with large packet memory (up to 1024 byte maximum payload
size) and non-blocking internal switch architecture, provides full line rate on all
p
embedded systems and AMC module
End-to-End Packet Integrity
The PEX 8505 provides end-to-end CRC protection (ECRC) and Poison-bit
support to enable designs that require end-to-end data integrity. These features a
o
ExpressLane switch product line
Configuration Flexibility
The PEX 8505 provides several ways to configure its operations. The device can be
configured through strapping pins, I
o
performance monitor
Interoperability
The PEX 8505 is designed to be fully compliant with the PCI-SIG PCI Express base
specification revision 1.1. Additionally, it supports auto-negotiation, lane rever
a
testing in PLX’s Interoperability Lab.
Low Power with Granular SerDes Control
The PEX 8505 provides low power capability that is fully compliant with the
PCI Express power management specification. For even lower power, the SerDes
physical links can be programmed for desired power or turned off when unused.
nd polarity reversal. The PEX 8505 als
ottlene
orts for performance hungry applications s
ptional in the PCI Express specific
ptional serial EEPROM. This allows for easy debug during the development phase,
Flexible & Versatile PCI Express
ulti-Function Printers, DVRs, Industrial Contr ol Systems, Medical Imaging
cks when the upstream and aggregated downstream bandwidths do not
www.plxtech.com
ing during the operation phase, and driver or software upgrade.
PEX 8505
s and AMC modules.
.
ation, but PLX provides them across its entire
2
C interface, CPU configuration cycles, or an
s.
o undergoes thorough Interoperability
uch as docking stations, control planes,
TM
PCIe Switch
®
Switch
sal,
r
re

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PEX 8505-AA25BI Summary of contents

Page 1

... Systems, Embedded System s and AMC modules. Port Configurations The PEX 8505 offers five lanes and up to five ports supporting x1 and x2 lane widths. The PEX 8505 features a flexible central packet memory that allocates a memory buffer for each port as required by the application or endpoint. This buffe ...

Page 2

... Suitable for control plane applications, multi-function printers, DVRs, industrial control systems, medical imaging systems, embedded systems & AMC modules, the PEX 8505 can be configured for a wide variety of form factors and applications. Control Plane Application The PEX 8505 is ideal for migrating existing PCI control ...

Page 3

... Figure 5 shows an example of a printer application. In this example, the low power processor used provides a limited number of PCI Express ports. The PEX 8505 can be used to provide four additional PCI Express ports for the connectivity of other system peripherals such as Ethernet as well any proprietary PCI Express based ASICs. ...

Page 4

... Product Ordering Information Part Number Description PEX 8505-AA25BI 5-Lane, 5-port PCI Express Switch PEX 8505-AA25BI G 5-Lane, 5-port PCI Express Switch Pb-Free PEX 8505 Rapid Development Kit Base Board; x1 PCIe Cable; PEX 8505-AA RDK Kit x1 PCIe Cable Adapter and RDK Port Expander Please visit the PLX Web site at http://www ...

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