80RIA40 Vishay, 80RIA40 Datasheet - Page 2

• Manufacturer Part Number: 80RIA40
• Description: SCR PHASE CONT 400V 125A TO-94
• Manufacturer: Vishay

Specifications of 80RIA40

• Scr Type: Standard Recovery
• Voltage - Off State: 400V
• Voltage - Gate Trigger (vgt) (max): 2.5V
• Voltage - On State (vtm) (max): 1.6V
• Current - On State (it (av)) (max): 80A
• Current - On State (it (rms)) (max): 125A
• Current - Gate Trigger (igt) (max): 120mA
• Current - Hold (ih) (max): 150mA
• Current - Off State (max): 15mA
• Current - Non Rep. Surge 50, 60hz (itsm): 1900A, 1990A
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Chassis, Stud Mount
• Package / Case: TO-209AC, TO-94
• Current - On State (it (rms) (max): 125A
• Breakover Current Ibo Max: 1990 A
• Rated Repetitive Off-state Voltage Vdrm: 400 V
• Off-state Leakage Current @ Vdrm Idrm: 15 mA
• Forward Voltage Drop: 1.6 V
• Gate Trigger Voltage (vgt): 2.5 V
• Maximum Gate Peak Inverse Voltage: 10 V
• Gate Trigger Current (igt): 120 mA
• Holding Current (ih Max): 200 mA
• Mounting Style: Stud
• Peak Repetitive Off-state Voltage, Vdrm: 400V
• Gate Trigger Current Max, Igt: 120mA
• Current It Av: 80A
• On State Rms Current It(rms): 125A
• Peak Non Rep Surge Current Itsm 50hz: 1.9kA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *80RIA40; VS-80RIA40; VS-80RIA40; VS80RIA40; VS80RIA40

80RIA...PbF, 81RIA...PbF, 82RIA...PbF Series
Vishay Semiconductors
www.vishay.com
2
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Maximum average on-state current
at case temperature
Maximum RMS on-state current
Maximum peak, one-cycle
non-repetitive surge current
Maximum I
Maximum I
Low level value of threshold voltage
High level value of threshold voltage
Low level value of on-state slope resistance
High level value of on-state slope resistance
Maximum on-state voltage
Maximum holding current
Typical latching current
SWITCHING
PARAMETER
Maximum non-repetitive rate of
rise of turned-on current
Typical delay time
Typical turn-off time
BLOCKING
PARAMETER
Maximum critical rate of rise of
off-state voltage
Maximum peak reverse and
off-state leakage current
2
2
t for fusing
t for fusing
[e-mail], [e-mail],
For technical questions within your region, please contact one of the following:
SYMBOL
SYMBOL
SYMBOL
V
V
I
dV/dt
I
T(RMS)
dI/dt
I
I
I
RRM
T(TO)1
T(TO)2
V
T(AV)
I
DRM
TSM
I
2
r
r
t
t
I
Phase Control Thyristors
I
2
TM
t1
t2
H
d
q
t
L
t
,
(Stud Version), 80 A
T
0.2 μF, 15 , gate pulse: 20 V, 65 , t
Per JEDEC standard RS-397, 5.2.2.6.
Gate pulse: 10 V, 15  source, t
V
I
dV/dt = 20 V/μs, gate bias: 0 V 25 , t
T
T
180° conduction, half sine wave
DC at 75 °C case temperature
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 0.1 ms to 10 ms, no voltage reapplied
(16.7 % x  x I
(I >  x I
(16.7 % x  x I
(I >  x I
I
T
TM
pk
J
d
J
J
J
= 125 °C, V
= 125 °C exponential to 67 % rated V
= 125 °C rated V
= 25 °C, anode supply 12 V resistive load
= Rated V
= 250 A, T
= 50 A, T
T(AV)
T(AV)
), T
), T
J
DRM
J
= T
d
No voltage
reapplied
100 % V
reapplied
No voltage
100 % V
reapplied
T(AV)
T(AV)
= 25 °C, t
J
J
= Rated V
, I
= T
= T
J
TEST CONDITIONS
TEST CONDITIONS
TEST CONDITIONS
TM
maximum, dI/dt = - 5 A/μs, V
< I <  x I
< I <  x I
DRM
J
J
maximum
maximum
= 50 Adc, T
[e-mail]
RRM
RRM
/V
p
RRM
DRM
= 10 ms sine pulse
T(AV)
T(AV)
, I
applied
Sinusoidal half wave,
initial T
TM
p
), T
), T
J
= 6 μs, t
= 2 x dI/dt snubber
= 25 °C
J
J
= T
= T
J
p
p
= T
= 6 μs, t
= 500 μs
J
J
DRM
r
maximum
maximum
J
= 0.1 μs,
maximum
R
r
= 0.5 μs
= 50 V,
Document Number: 94392
Revision: 17-Sep-10
VALUES
VALUES
VALUES
180.5
1900
1990
1600
1675
12.7
11.7
0.99
1.13
2.29
1.84
1.60
125
200
400
300
110
500
80
85
18
16
15
1
UNITS
UNITS
UNITS
kA
kA
A/μs
V/μs
m
mA
mA
°C
μs
A
A
V
V
2
2
s
s