UDA1330ATSDK NXP Semiconductors, UDA1330ATSDK Datasheet - Page 10

• Manufacturer Part Number: UDA1330ATSDK
• Description: DAC 2-CH Interpolation Filter 16-Pin SSOP Tube
• Manufacturer: NXP Semiconductors

Specifications of UDA1330ATSDK

• Package: 16SSOP
• Conversion Rate: 55 KSPS
• Architecture: Interpolation Filter
• Digital Interface Type: Serial (3-Wire)
• Number Of Outputs Per Chip: 2
• Output Type: Voltage
• Signal To Noise Ratio: 100(Typ) dB

NXP Semiconductors
Programming the features
When the data transfer of type ‘status’ is selected, the features for the system clock frequency and the data input format
can be controlled.
Table 6 Data transfer of type ‘status’
When the data transfer of type ‘data’ is selected, the features for volume, de-emphasis and mute can be controlled.
Table 7 Data transfer of type ‘data’
2001 Feb 02
handbook, full pagewidth
BIT 7
BIT 7
Low-cost stereo filter DAC
0
1
0
0
1
1
BIT 6
BIT 6
0
0
0
1
0
1
L3CLOCK
L3MODE
BIT 5
BIT 5
L3DATA
SC1
VC5
0
0
0
0
BIT 4
BIT 4
SC0
VC4
DE1
0
0
0
BIT 3
BIT 3
VC3
DE0
IF2
0
0
0
address
BIT 2
BIT 2
VC2
IF1
MT
0
0
0
Fig.6 Multibyte data transfer.
data byte #1
BIT 1
BIT 1
VC1
IF0
0
0
0
0
10
BIT 0
BIT 0
VC0
t stp(L3)
0
0
0
0
1
SC = system clock frequency (2 bits); see Table 8
IF = data input format (3 bits); see Table 9
not used
VC = volume control (6 bits); see Table 11
not used
DE = de-emphasis (2 bits); see Table 10
MT = mute (1 bit); see Table 12
default setting
data byte #2
REGISTER SELECTED
REGISTER SELECTED
address
MGL725
UDA1330ATS
Product specification