S19233PRIB AMCC, S19233PRIB Datasheet - Page 19

• Manufacturer Part Number: S19233PRIB
• Description: Ethernet/Fibre Channel 49-Pin BGA
• Manufacturer: AMCC

Specifications of S19233PRIB

• Package: 49BGA
• Maximum Data Rate: 11.32 Gbps
• Transmission Media Type: Wire
• Power Supply Type: Analog
• Typical Supply Current: 380 mA
• Typical Operating Supply Voltage: 1.8|3.3 V
• Minimum Operating Supply Voltage: 1.65|3.03 V
• Maximum Operating Supply Voltage: 1.95|3.56 V

S19233 – 10 G Ethernet/Fibre Channel/SONET/SDH
Dual CDR
Table 9. Signals Pin Assignments and Descriptions (Continued)
Table 10. Common Pin Assignments and Descriptions
AMCC Confidential and Proprietary
PD/RSTB
REFCLKP
REFCLKN
SDA
SCL
SCANMODE
AVDD_TX
AVDD_RX
VDD_TX
VDD_RX
VDD_PA_TX
VDD_PA_RX
VDD_CMOS
VDD_33IO
VSS
Pin Name
Pin Name
pull-down
LVCMOS
LVPECL
LVTTL
Level
BUS
down
Pull-
I2C
+1.8 V
+1.8 V
+1.8 V
+1.8 V
+1.8 V
+1.8 V
+1.8 V
+3.3 V
Level
GND
®
I/O
I/O
I
I
I
I
I/O
Pin#
D3
E5
E4
C5
C3
E3
B7, E7
C1, F1
B5, B6
F2, F3
F5, F6
B2, B3
D4
B4
A3, A4, A7, B1, C6, D2, D5, D6,
E2, F7, G1, G4, G5
Powerdown/Reset, active HIGH input. Default Low, when high, power
downs the Transmitter and Receiver. 2-wire Serial (l2C) interface and reset
generation logic is functional during power-down.The falling edge initiates a
complete reset of TX/RX including 2-wire serial interface.
Reference Clock. 155.52 MHz (or equivalent FEC/10 GE/10 G FC fre-
quency) input used as the reference for the internal bit clock frequency syn-
thesizer for both receive and transmit reference clock. This input is internally
biased and terminated. This input must be AC coupled. REFCLKP/N must
be supplied continuously in order to access read/write registers through the
I2C interface.
I
reads from and writes into most of the S19233 control logic.
Scan Logic Input. Active High. Bring device into scan mode. Default low
for normal operation.
2
C BUS
COMMON Signals
®
. Bi-directional 2-wire bus for efficient inter-IC control. This bus
Pin #
Description
Transmit analog power supply
Receive analog power supply
Transmit CML power supply
Receive CML power supply
Transmit PA power supply
Receive PA power supply
CMOS power supply
I/O power supply
Ground
Revision 5.00 – March 16, 2007
Description
Data Sheet
19