M28480G-11 Mindspeed Technologies, M28480G-11 Datasheet - Page 2

• Manufacturer Part Number: M28480G-11
• Description: Synchronous Communications Controller 484-Pin FBGA
• Manufacturer: Mindspeed Technologies

Specifications of M28480G-11

• Package: 484FBGA
• Maximum Data Rate: 155.52 Mbps
• Power Supply Type: Analog
• Typical Operating Supply Voltage: 1.2|3.3 V

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General Information: [phone]
M28480 MUSYCC Product Highlights
Applications
The MUSYCC-512 is ideal for signaling appli-
cations requiring high density HDLC support.
Typical applications for this device include
media gateways, signaling gateways, signaling
transfer points, and base station controllers.
With support for 84 high speed SS7 links, the
MUSYCC-512 addresses future growth re-
quirements for these applications. Mindspeed
also provides complete line card solutions for
these applications with VoIP DSPs, Network
Processors, and T3/E3 and SONET products.
512-channel HDLC controller
OSI Layer 2 protocol support
General purpose HDLC (ISO
3309)
HW MTP1 and convergence
layer MTP2 protocols
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www.mindspeed.com/salesoffices
4000 MacArthur Blvd., East Tower
Newport Beach, CA 92660-3007
Headquarters – Newport Beach
SS7 protocol
X.25 (LAPB)
Frame relay (LAPF/ANSI
T1.618)
ISDN D-channel (LAPD/
Q.921)
ISLP support
SS7 FISU/LSSU filters,
auto transmission and
error monitors included
High speed SS7 (Q.703
Annex A)
JT-Q.703
Chinese 2M GB STD
M28480-BRF-001-C.pdf
© 2009 Mindspeed Technologies, Inc. All rights reserved. Mindspeed and the Mindspeed logo are
trademarks of Mindspeed Technologies. All other trademarks are the property of their respec-
tive owners. Although Mindspeed Technologies strives for accuracy in all its publications, this
material may contain errors or omissions and is subject to change without notice. This material is
provided as is and without any express or implied warranties, including merchantability, fitness
for a particular purpose and non-infringement. Mindspeed Technologies shall not be liable for
any special, indirect, incidental or consequential damages as a result of its use.
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8 independent serial inter-
faces, which support:
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8 T1/E1 data streams
3 HSSI interfaces (52 Mbps)
8x 16.384 Mbps (or any lower
rate) serial interfaces
Configurable logical channels
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Mixed data rates (combi-
nation of T1/E1/, T3/E3,
etc.) as long as they do
not exceed each port’s
respective bandwidth
limitation and the overall
device bandwidth of
155.52 Mbps per direction
Standard DS0 (56, 64
Kbps)
Sub-channeling (N x 8
Kbps)
Hyper-channel (N x 64
Kbps)
Unchannelized mode
For more product information, please visit
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Configuration
Configuration
(Function 0)
Per-channel protocol mode
selection
Hardware flow control (CTS)
Selectable Endian configura-
tion on data
Per-channel DMA buffer
management
Per-channel message length
check
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Registers
Interface
Interface
Figure 1: M28480 Functional Block Diagram
Device
Space
EXP BUS
HOST
(PCI)
PCI
PCI
Non-FCS mode
16-bit FCS mode
32-bit FCS mode
Transparent mode
(unformatted data)
Table-like data struc-
tures
Variable size transmit/
receive FIFO
Select no length checking
Select from one of
three 14-bit max length
registers
Local BUS
RxDMA
TxDMA
and
JTAG
Processor
Processor
Rx Line
Tx Line
RSLP
TSLP
Ordering
M28480-11 : PCI Interface
M28480G-11 : PCI Interface ROHS
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Direct PCI bus interface
HSSI interfaces (52 Mbps)
Local expansion bus inter-
face (EBUS)
Support of 64-bit ECC host
memory
Low power, 1.2V/3.3V CMOS
operation
23mm, 484 pin PBGA package
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32-bit, 33/66 MHz opera-
tion
Bus master and slave
operation
PCI Version 2.1
32-bit multiplexed
address/data bus
Access
Interface
Test
Serial
(SIU)
Unit
Info:
www.mindspeed.com
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7
Highway
PCM