SSM2166SZ Analog Devices Inc, SSM2166SZ Datasheet - Page 12

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SSM2166SZ

Manufacturer Part Number
SSM2166SZ
Description
Audio Amp Microphone 1-CH Mono Class-AB 14-Pin SOIC N
Manufacturer
Analog Devices Inc
Datasheets

Specifications of SSM2166SZ

Package
14SOIC N
Function
Microphone
Amplifier Type
Class-AB
Typical Voltage Gain
60 dB
Total Harmonic Distortion Noise
0.25@100000Ohm %
Typical Psrr
50 dB
Typical Gain Bandwidth Product
30 MHz
Maximum Load Resistance
100000 Ohm
Output Type
1-Channel Mono
Voltage - Supply
4.5 V ~ 5.5 V
Features
Microphone
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Bandwidth
20 kHz
Current, Supply
7.5 mA
Harmonic Distortion
0.25 %
Impedance, Thermal
120 °C/W
Package Type
SOIC-14
Temperature, Operating, Range
-40 to +85 °C
Voltage, Input
1 V
Voltage, Noise
17 nV/sqrt Hz
Voltage, Supply
4.5 to 5.5 V
No. Of Channels
1
Supply Voltage Range
4.5V To 5.5V
Load Impedance
75ohm
Operating Temperature Range
-40°C To +85°C
Amplifier Case Style
SOIC
No. Of Pins
14
Msl
MSL 1 - Unlimited
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Max Output Power X Channels @ Load
-
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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0
SSM2166
POWER-DOWN FEATURE
The supply current of the SSM2166 can be reduced to less than
100 μA by applying an active high, 5 V CMOS-compatible input
to the POWER DOWN pin (Pin 12). In this state, the input and
output circuitry of the SSM2166 assumes a high impedance
state; as such, the potentials at the input pin and the output pin are
determined by the external circuitry connected to the SSM2166.
The SSM2166 takes approximately 200 ms to settle from a power-
down to power-on command. For power-on to power-down,
the SSM2166 requires more time, typically less than 1 second.
Cycling the power supply to the SSM2166 can result in quicker
settling times: the off-to-on settling time of the SSM2166 is less
than 200 ms, while the on-to-off settling time is less than 1 ms.
In either implementation, transients may appear at the output of
the device. To avoid these output transients, use mute control of
the VCA gain as previously mentioned.
PCB LAYOUT CONSIDERATIONS
Because the SSM2166 is capable of wide bandwidth operation
and can be configured for as much as 80 dB of gain, special care
must be exercised in the layout of the PCB that contains the IC
and its associated components. The following recommendations
should be considered and/or followed:
In some high system gain applications, the shielding of input
wires to minimize possible feedback from the output of the
SSM2166 back to the input circuit may be necessary.
A single-point (star) ground implementation is recom-
mended in addition to maintaining short lead lengths and
PCB runs. The evaluation board layout shown in Figure 27,
Figure 28, and Figure 29 demonstrates the single-point
grounding scheme. In applications where an analog ground
and a digital ground are available, the SSM2166 and its
surrounding circuitry should be connected to the analog
ground of the system. Because of these recommendations,
wire-wrap board connections and grounding
implementations should be avoided.
The internal buffer of the SSM2166 was designed to drive only
the input of the internal VCA and its own feedback network.
Stray capacitive loading to ground from the BUF OUT pin in
excess of 5 pF to 10 pF can cause excessive phase shift and
can lead to circuit instability.
Rev. D | Page 12 of 20
The value of C7 should be the same as C6, which is the capacitor
value used between BUF OUT and VCA
makes the source ground noise appear as a common-mode signal
to the VCA, allowing the common-mode noise to be rejected by
the VCA differential input circuitry. C7 can also be useful in
reducing ground loop problems and in reducing noise coupling
from the power supply by balancing the impedances connected
to the inputs of the internal VCA.
Figure 25. Circuit Configuration for Use with High Impedance Signal Sources
When using high impedance sources (≥5 kΩ), system gains
in excess of 60 dB are not recommended. This configuration
is rarely appropriate because virtually all high impedance
inputs provide larger amplitude signals that do not require
as much amplification. When using high impedance sources,
however, it can be advantageous to shunt the source with a
capacitor to ground at the input pin of the IC (Pin 7) to
lower the source impedance at high frequencies, as shown
in Figure 25. A capacitor with a value of 1000 pF is a good
starting value and sets a low-pass corner at 31 kHz for 5 kΩ
sources. In applications where the source ground is not as
clean as would be desirable, a capacitor (illustrated as C7
on the evaluation board) from the VCA
ground may prove beneficial. This capacitor is used in
addition to the grounded capacitor (illustrated as C2 on the
evaluation board) used in the feedback around the buffer,
assuming that the buffer is configured for gain.
AUDIO +IN
(R
S
NOTES
1. ADDITIONAL CIRCUIT DETAILS OMITTED
> 5kΩ)
FOR CLARITY.
0.1µF
C1
1000pF
C
AUDIO +IN
X
7
IN
SSM2166
. This connection
R
input to the source

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