IRFD9010PBF Vishay, IRFD9010PBF Datasheet - Page 6
![MOSFET P-CH 50V 1.1A 4-DIP](/photos/5/47/54769/698-4-dip_sml.jpg)
IRFD9010PBF
Manufacturer Part Number
IRFD9010PBF
Description
MOSFET P-CH 50V 1.1A 4-DIP
Manufacturer
Vishay
Series
HEXFET®r
Specifications of IRFD9010PBF
Transistor Polarity
P-Channel
Fet Type
MOSFET P-Channel, Metal Oxide
Fet Feature
Standard
Rds On (max) @ Id, Vgs
500 mOhm @ 580mA, 10V
Drain To Source Voltage (vdss)
50V
Current - Continuous Drain (id) @ 25° C
1.1A
Vgs(th) (max) @ Id
4V @ 250µA
Gate Charge (qg) @ Vgs
11nC @ 10V
Input Capacitance (ciss) @ Vds
240pF @ 25V
Power - Max
1W
Mounting Type
Through Hole
Package / Case
4-DIP (0.300", 7.62mm)
Minimum Operating Temperature
- 55 C
Resistance Drain-source Rds (on)
0.35 Ohms
Forward Transconductance Gfs (max / Min)
2.5 S
Drain-source Breakdown Voltage
50 V
Gate-source Breakdown Voltage
20 V
Continuous Drain Current
1.1 A
Power Dissipation
1 W
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Continuous Drain Current Id
-1.1A
Drain Source Voltage Vds
-50V
On Resistance Rds(on)
350mohm
Rds(on) Test Voltage Vgs
-10V
Threshold Voltage Vgs Typ
-4V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
*IRFD9010PBF
IRFD9010, SiHFD9010
Vishay Siliconix
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91405.
www.vishay.com
6
Re-applied
voltage
Reverse
recovery
current
+
-
R
Compliment N-Channel of D.U.T. for driver
g
D.U.T.
*
Driver gate drive
D.U.T. I
D.U.T. V
Inductor current
V
GS
P.W.
= - 5 V for logic level and - 3 V drive devices
SD
DS
waveform
waveform
Peak Diode Recovery dV/dt Test Circuit
Ripple ≤ 5 %
Body diode forward drop
Period
Body diode forward
+
-
• dV/dt controlled by R
• I
• D.U.T. - device under test
Fig. 14 - For P-Channel
SD
Diode recovery
current
controlled by duty factor "D"
Circuit layout considerations
dV/dt
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
dI/dt
D =
-
G
Period
P.W.
+
V
V
I
SD
GS
DD
= - 10 V*
+
-
V
DD
S10-0998-Rev. A, 26-Apr-10
Document Number: 91405