LAN91C96TQFP SMSC, LAN91C96TQFP Datasheet - Page 54

• Manufacturer Part Number: LAN91C96TQFP
• Description: Ethernet ICs Non-PCI 10 Mbps Ethernet MAC
• Manufacturer: SMSC
• Type: Single Chip MAC and PHY Controllerr

Specifications of LAN91C96TQFP

• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: 802.3, 802.3u
• Data Rate: 10 Mbps, 100 Mbps
• Supply Voltage (max): 5 V
• Supply Voltage (min): 0 V
• Supply Current (max): 95 mA
• Maximum Operating Temperature: + 70 C
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Revision 1.0 (10-24-08)
Reserved
I/O SPACE - BANK2
This register is used by the CPU to control the memory allocation, de-allocation, TX FIFO and RX FIFO
control. The three command bits determine the command issued as described below:
High byte:
Low byte:
Reserved – Must be 0.
COMMAND SET:
wxyz
0000
0010
0100
0110
0111
1010
OFFSET
0
w
0
Reserved
COMMAND
0
0)
2)
4)
6)
7)
8)
A)
x
MMU COMMAND REGISTER
Reserved
NOOP - NO OPERATION -
ALLOCATE MEMORY FOR TX - N2, N1, N0 defines the amount of memory
requested as (value + 1) 256* bytes. Namely N2, N1, N0 = 1
256* = 512 bytes. Valid range for N2, N1, N0 is 0 through 5. A shift-based divide
by 256 of the packet length yields the appropriate value to be used as N2, N1
and N0. Immediately generates a completion code at the ALLOCATION RESULT
REGISTER. Can optionally generate an interrupt on successful completion. The
allocation time can take worst case (N2, N1, N0 + 2)* 200ns.
RESET MMU TO INITIAL STATE - Frees all memory allocations, clears relevant
interrupts, resets packet FIFO pointers.
REMOVE FRAME FROM TOP OF RX FIFO- To be issued after CPU has
completed processing of present receive frame. This command removes the
receive packet number from the RX FIFO and brings the next receive frame (if
any) to the RX area (output of RX FIFO).
REMOVE FRAME FROM TOP OF TX FIFO- To be issued ONLY after the Host
disabled the transmitter and has completed processing of the present transmit
frame. Note: Determining Transmit completion is done by polling the TEMPTY bit
in the Transmit FIFO Port Register. This command removes the Transmit packet
number from the TX FIFO and brings the next Transmit frame (if any) to the TX
area (output of TX FIFO).
REMOVE AND RELEASE TOP OF RX FIFO - Like 6) but also releases all
memory used by the packet presently at the RX FIFO output.
RELEASE SPECIFIC PACKET - Frees all pages allocated to the packet
specified in the PACKET NUMBER REGISTER. Should not be used for frames
pending transmission. Typically used to remove transmitted frames, after reading
their completion status.
0
y
NAME
DATASHEET
Reserved
0
z
Page 54
Reserved
Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
0
0
BUSY bit readable
Reserved
WRITE ONLY
0
N2
TYPE
Reserved
N1
0
SYMBOL
MMUCR
SMSC LAN91C96 5v&3v
Reserved
will
BUSY
N0/
0
0
request
Datasheet
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