DS2174Q Maxim Integrated Products, DS2174Q Datasheet - Page 13

• Manufacturer Part Number: DS2174Q
• Description: Telecom ICs Enhanced Bit Error R ate Tester T1-E1-J1
• Manufacturer: Maxim Integrated Products
• Type: Bit Error Rate Testerr

Specifications of DS2174Q

• Operating Supply Voltage: 3.3 V
• Supply Current: 50 mA
• Mounting Style: SMD/SMT
• Package / Case: PLCC-44

3.1 Mode Select
The DS2174 is configured to operate in bit, nibble, or byte mode by using the MODE1/MODE0 bits in
Control Register 2.
Table 3-A. Mode Select
3.1.1 Error Insertion
The DS2174 inserts bit errors at a particular rate by setting the error insertion bits in Control Register 2
(Table 3-B). In addition, the device inserts errors on command by setting the SBE bit in Control Register
2. The bit that occurs after the rising edge of the SBE insert bit is inverted. In the case of the QRSS
pattern, this could result in a string of 0’s longer than 14 bits; the DS2174 delays the erred bit by 1 clock
cycle.
Data in the nibble and byte modes is presented 4 or 8 bits at a time. When in nibble or byte mode and
selecting 10
selecting an error rate of 10
Table 3-B. Error Bit Insertion
EIR2
MODE1
0
0
0
0
1
1
1
1
0
0
1
1
EIR1
0
0
1
1
0
0
1
1
-1
MODE0
error rate, the device actually produces an error rate of 8
0
1
0
1
EIR0
0
1
0
1
0
1
0
1
-2
ERROR RATE
OPERATION MODE
, the device produces an error rate of 8
None
10
10
10
10
10
10
10
Invalid
Nibble
-1
-2
-3
-4
-5
-6
-7
Byte
Bit
13 of 24
SERIAL
4
4
4
4
4
4
4
4
NIBBLE
8
4
4
4
4
4
4
4
-2
-1
.
-1
. When in byte mode and
BYTE
8
8
4
4
4
4
4
4
-1
-2