DS2155G/T&R Maxim Integrated Products, DS2155G/T&R Datasheet - Page 236

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DS2155G/T&R

Manufacturer Part Number
DS2155G/T&R
Description
Network Controller & Processor ICs T1/E1/J1 Single-Chip gle-Chip Transceiver
Manufacturer
Maxim Integrated Products
Datasheet

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Figure 37-13. Transmit-Side Timing, Elastic Store Enabled
Note 1: TSER is only sampled on the falling edge of TSYSCLK when the transmit-side elastic store is enabled.
Note 2: TCHCLK and TCHBLK are synchronous with TSYSCLK when the transmit-side elastic store is enabled.
Figure 37-14. Transmit Line Interface Timing
TPOSO, TNEGO
TPOSI, TNEGI
TCHCLK
TSYSCLK
TCHBLK
TCLKO
TSSYNC
TCLKI
TSER
t
R
t
R
t D3
t DD
F t
t SU
F t
t D3
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t
SU
t
HD
t SU
t HD
t HD
t
SL
t
LL
t
SP
t
LP
t
SH
t
LH

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