DS2172TN/T&R Maxim Integrated Products, DS2172TN/T&R Datasheet - Page 8

• Manufacturer Part Number: DS2172TN/T&R
• Description: Communication ICs - Various
• Manufacturer: Maxim Integrated Products
• Type: Bit Error Rate Testerr

Specifications of DS2172TN/T&R

• Mounting Style: SMD/SMT
• Operating Supply Voltage: 5 V
• Supply Type: Analog
• Package / Case: TQFP-32
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Supply Current: 10 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.0 PATTERN CONTROL REGISTER
The Pattern Control Register (PCR) is used to configure the operating parameters of the DS2172 and to
control the patterns being generated and received. Also the PCR is used to control the pattern
synchronizer and the error and bit counters.
PCR: PATTERN CONTROL REGISTER (Address=06 Hex)
SYMBOL POSITION NAME AND DESCRIPTION
RESYNC
SYNCE
(MSB)
QRSS
LPBK
LC
RL
TL
TL
PS
QRSS
PCR.7
PCR.6
PCR.5
PCR.4
PCR.3
PCR.2
PCR.1
PCR.0
Transmit Load. A low to high transition loads the pattern generator with
the contents of the Pattern Set Registers. PCR.7 is logically OR’ed with the
input pin TL. Must be cleared and set again for subsequent loads.
Zero Suppression Select. Forces a 1 into the pattern whenever the next 14
bit positions are all 0s. Should only be set when using the QRSS pattern.
0 = Zero suppression disabled
1 = Zero suppression enabled
Pattern Select.
0 = Repetitive Pattern
1 = Pseudorandom Pattern
Latch Count Registers. A low to high transition latches the bit and error
counts into the user accessible registers BCR and BECR and clears the
internal register count. PCR.4 is logically OR’ed with input pin LC. Must
be cleared and set again for subsequent loads.
Receive Data Load. A transition from low to high loads the previous
32 bits of data received at RDATA into the Pattern Receive Registers
(PRR). PCR.3 is logically OR’ed with input pin RL. Must be cleared and
set again for subsequent latches.
SYNC Enable.
0 = auto resync is enabled.
1 = auto resync is disabled.
Initiate Manual Resync Process. A low to high transition will force the
DS2172 to resynchronize to the incoming pattern at RDATA. Must be
cleared and set again for a subsequent resync.
Transmit/Receive Loopback Select. When enabled, the RDATA input is
disabled; TDATA continues to output data as normal. See Figure 1.
0 = loopback disabled
1 = loopback enabled
PS
LC
8 of 22
RL
SYNCE
RESYNC
LPBK
(LSB)
DS2172