MC100LVEL13DW ON Semiconductor, MC100LVEL13DW Datasheet - Page 3

• Manufacturer Part Number: MC100LVEL13DW
• Description: Clock Buffer 3.3V ECL Dual 1:3
• Manufacturer: ON Semiconductor

Specifications of MC100LVEL13DW

• Number Of Outputs: 12
• Propagation Delay (max): 0.62 ns
• Supply Voltage (max): +/- 3.8 V
• Supply Voltage (min): +/- 3 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-20 Wide
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2. MAXIMUM RATINGS
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may
affect device reliability.
V
V
V
I
T
T
q
q
T
Symbol
out
A
stg
JA
JC
sol
CC
EE
I
Figure 1. Logic Diagram and Pinout: 20−Lead SOIC
Warning: All V
Power Supply to guarantee proper operation.
Q1a Q1a
Q0a
20
1
Q0a
19
2
PECL Mode Power Supply
NECL Mode Power Supply
PECL Mode Input Voltage
NECL Mode Input Voltage
Output Current
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction to Ambient)
Thermal Resistance (Junction to Case)
Wave Solder
Q2a
V
CC
18
CC
3
and V
CLKa
Q2a V
17
4
EE
(Top View)
Parameter
CLKa
pins must be externally connected to
16
CC
5
CLKb
Q2b Q2b Q1b Q1b V
15
6
CLKb V
14
7
Pb−Free
13
8
CC
Pb
Q0b Q0b
12
9
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V
V
V
V
Continuous
Surge
0 lfpm
500 lfpm
Standard Board
<2 to 3 sec @ 248°C
<2 to 3 sec @ 260°C
EE
CC
EE
CC
Condition 1
10
11
= 0 V
= 0 V
EE
= 0 V
= 0 V
3
Table 1. PIN DESCRIPTION
PIN
Qna, Qna
Qnb, Qnb
CLKn, CLKn
V
V
CC
EE
V
V
20 SOIC
20 SOIC
20 SOIC
I
I
 V
 V
Condition 2
CC
EE
FUNCTION
ECL Differential Clock Outputs
ECL Differential Clock Outputs
ECL Differential Clock Inputs
Positive Supply
Negative Supply
−65 to +150
−40 to +85
30 to 35
Rating
−8 to 0
−6 to 0
8 to 0
6 to 0
100
265
265
50
90
60
°C/W
°C/W
°C/W
Unit
mA
mA
°C
°C
°C
V
V
V
V