MC100LVEL13DW ON Semiconductor, MC100LVEL13DW Datasheet

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MC100LVEL13DW

Manufacturer Part Number
MC100LVEL13DW
Description
Clock Buffer 3.3V ECL Dual 1:3
Manufacturer
ON Semiconductor
Datasheet

Specifications of MC100LVEL13DW

Number Of Outputs
12
Propagation Delay (max)
0.62 ns
Supply Voltage (max)
+/- 3.8 V
Supply Voltage (min)
+/- 3 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Package / Case
SOIC-20 Wide
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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MC100LVEL13
3.3V ECL Dual 1:3 Fanout
Buffer
Description
The Low Output−Output Skew of the device makes it ideal for
distributing two different frequency synchronous signals.
stability under open input conditions. When both differential inputs
are left open the D input will pull down to V
around V
Features
© Semiconductor Components Industries, LLC, 2008
November, 2008 − Rev. 6
The MC100LVEL13 is a dual, fully differential 1:3 fanout buffer.
The differential inputs have special circuitry which ensures device
with V
with V
For Additional Information, see Application Note AND8003/D
Oxygen Index: 28 to 34
500 ps Typical Propagation Delays
50 ps Output−Output Skews
ESD Protection: >2 kV Human Body Model
The 100 Series Contains Temperature Compensation
PECL Mode Operating Range: V
NECL Mode Operating Range: V
Internal Input Pulldown Resistors
Q Output will Default LOW with Inputs Open or at V
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity: Pb = Level 1
Flammability Rating: UL 94 V−0 @ 0.125 in,
Transistor Count = 143 devices
CC
EE
EE
/2 and the Q output will go LOW.
= −3.0 V to −3.8 V
= 0 V
Pb−Free = Level 3
CC
CC
= 3.0 V to 3.8 V
= 0 V
EE
, The D input will bias
EE
1
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
20
A
WL
YY
WW
G
1
MARKING DIAGRAM*
http://onsemi.com
AWLYYWWG
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
DW SUFFIX
CASE 751D
SO−20 WB
100LVEL13
Publication Order Number:
MC100LVEL13/D

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MC100LVEL13DW Summary of contents

Page 1

MC100LVEL13 3.3V ECL Dual 1:3 Fanout Buffer Description The MC100LVEL13 is a dual, fully differential 1:3 fanout buffer. The Low Output−Output Skew of the device makes it ideal for distributing two different frequency synchronous signals. The differential inputs have special circuitry ...

Page 2

... Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 2 ...

Page 3

Q1a Q1a Q2a Q2a V Q2b Q2b Q1b Q1b Q0a Q0a V CLKa CLKa CLKb CC Warning: All V and V pins must be externally connected ...

Page 4

Table 3. LVPECL DC CHARACTERISTICS Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended Input ...

Page 5

Table 5. AC CHARACTERISTICS V CC Symbol Characteristic f Maximum Toggle Frequency max t Propagation Delay CLK to Q/Q PLH t PHL t Output−Output Skew sk(O) Any Qa to Qa, Any Any Qa to Any Qb t ...

Page 6

... ORDERING INFORMATION Device MC100LVEL13DW MC100LVEL13DWG MC100LVEL13DWR2 MC100LVEL13DWR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1672/D AND8001/D − Odd Number Counters Design AND8002/D − ...

Page 7

... Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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